By: Konrad Schwarz (no.spam.delete@this.no.spam), May 19, 2021 7:35 am
Room: Moderated Discussions
Doug S (foo.delete@this.bar.bar) on May 18, 2021 8:45 am wrote:
> This is the biggest problem. Cache and TLB flushes are a lot of the cost of context switches, it isn't
> all saving registers.
The only case I can think of where a context switch requires explicit cache and TLB
flushes on modern hardware is if the operating system needs to re-use
an address-space identifier (ASID), the software-defined tag
used to separate TLB entries of different processes.
> This is the biggest problem. Cache and TLB flushes are a lot of the cost of context switches, it isn't
> all saving registers.
The only case I can think of where a context switch requires explicit cache and TLB
flushes on modern hardware is if the operating system needs to re-use
an address-space identifier (ASID), the software-defined tag
used to separate TLB entries of different processes.