By: dmcq (dmcq.delete@this.fano.co.uk), May 19, 2021 1:47 pm
Room: Moderated Discussions
Little Horn (sink.delete@this.example.net) on May 17, 2021 5:03 pm wrote:
> Thoughts?
It doesn't seem to solve any reasonably big problem. It isn't something like capabilities for instance which would solve a host of problems and dramatically speed some important things up - albeit whilst introducng a few more problems :-)
Personally though I quite ike the idea of associating all the registers with an address space identifier rather than just it being used to help with caching memory - and call that a task identifier. The hardware could automatically swap in and out an entire task depending on the identifier. I don't think the hardware would be too difficult and would be reasonably efficient for small machines and there would be lots of room for optimisation for fast ones. I don't think the savings would be very dramatic but it simplifies the architectural model and makes it easier to extend.
Watching memory locations sounds far less like a solution to any real problem. It should just use the standard interrupt mechanism to send signals around with the addition of setting a task identifier. They have been optimised for the job and I don't see that this gives anything very desirable over and beyond that. Interrupts need not involve a function call - the handling could be treated more as a coprocessor call.
> Thoughts?
It doesn't seem to solve any reasonably big problem. It isn't something like capabilities for instance which would solve a host of problems and dramatically speed some important things up - albeit whilst introducng a few more problems :-)
Personally though I quite ike the idea of associating all the registers with an address space identifier rather than just it being used to help with caching memory - and call that a task identifier. The hardware could automatically swap in and out an entire task depending on the identifier. I don't think the hardware would be too difficult and would be reasonably efficient for small machines and there would be lots of room for optimisation for fast ones. I don't think the savings would be very dramatic but it simplifies the architectural model and makes it easier to extend.
Watching memory locations sounds far less like a solution to any real problem. It should just use the standard interrupt mechanism to send signals around with the addition of setting a task identifier. They have been optimised for the job and I don't see that this gives anything very desirable over and beyond that. Interrupts need not involve a function call - the handling could be treated more as a coprocessor call.
