Adrian (a.delete@this.acm.org) on July 25, 2021 9:16 pm wrote:

> This "streaming" mode is actually exactly like the traditional vector computers have operated. For
> example a Cray-1 had an apparent vector register width of 1024 bits, but the vector operations were
> computed by a 64-bit pipelined ALU, in multiple clock cycles, i.e. "looping", like you say.

the really nice thing about Cray-style Vectors is the "setvl" instruction.
you request an arbitrary length (not limited to a power-of-two) and the
hardware sets VL equal to as much as it can manage.

what i *don't* know - and can't tell even by looking at the pseudocode linked from here:
https://bugs.libre-soc.org/show_bug.cgi?id=893#c16

is whether the Scalable Matrix Extension can set an arbitrary non-power-of-2
dimension size. tracking through the pseudocode for CurrentVL to its definition
goes through a cascading sequence of hoops of other definitions.

can anyone tell for certain if SME can do matrix dimensions of say 7, or 21,
or 35, as opposed to being specifically restricted to 2/4/8/16/32/... ?

tia,

l.