By: gallier2 (gallier2.delete@this.gmx.de), July 30, 2021 12:35 am
Room: Moderated Discussions
James (no.delete@this.thanks.invalid) on July 29, 2021 2:52 pm wrote:
> Blue (Blue.delete@this.blue.com) on July 27, 2021 9:15 am wrote:
>
> > Just wish Intel has gone right to “xxA” naming.
>
> I can't help thinking that "Intel 7", "Intel 4" and "Intel 3" are unambiguous (or are ambiguous in
> a good way for Intel). But "20" was always going to be confused with 20 nm, so they did the old Intel
> trick of adding an "A" to the end, like with the Celeron 300 and 300A¹. Then someone asked what
> the "A" in "20A" meant, and someone else was rather too creative with their explanations...
the A stands for Ångström i.e. 10⁻¹⁰m vs nm which is 10⁻⁹m
>
> > Or done naming off of some density formula to avoid inevitably
> > changing naming convention as we approach zero.
>
> Intel marketing has rarely managed to stick to a naming convention for more
> than ten years: why start now? We're due for a change to the Core in branding:
> anyone care to guess how they're going to brand their hybrid chips?
>
> ¹ The Celeron 300 had no L2 cache; the 300A had 128K of on-die L2 cache.
> Blue (Blue.delete@this.blue.com) on July 27, 2021 9:15 am wrote:
>
> > Just wish Intel has gone right to “xxA” naming.
>
> I can't help thinking that "Intel 7", "Intel 4" and "Intel 3" are unambiguous (or are ambiguous in
> a good way for Intel). But "20" was always going to be confused with 20 nm, so they did the old Intel
> trick of adding an "A" to the end, like with the Celeron 300 and 300A¹. Then someone asked what
> the "A" in "20A" meant, and someone else was rather too creative with their explanations...
the A stands for Ångström i.e. 10⁻¹⁰m vs nm which is 10⁻⁹m
>
> > Or done naming off of some density formula to avoid inevitably
> > changing naming convention as we approach zero.
>
> Intel marketing has rarely managed to stick to a naming convention for more
> than ten years: why start now? We're due for a change to the Core in branding:
> anyone care to guess how they're going to brand their hybrid chips?
>
> ¹ The Celeron 300 had no L2 cache; the 300A had 128K of on-die L2 cache.