on types of cells

By: blue (blue.delete@this.blue.com), July 31, 2021 11:34 am
Room: Moderated Discussions
Intel can claim what they want, but AMD is making vastly denser CPUs with similar clocks and similar/better performance per watt and area despite not using these specialized cells nearly as much.

Seems like Intel's density is either BS, or both their architects and process team are terrible...

Their 14nm "wide" Knights Landing architecture was ~682mm with ~7.1b transistors, or a bit over 10 million/mm^2.

Zen1, aimed at higher performance dense cores at the "it's 20nm class node renamed" was ~213mm with ~4.8b transistors. A bit over 22 million/mm^2.

Intel supposedly is twice as dense, so are we saying the cache is what is giving Zen over 4x the effective density? That seems pretty insane to me.

That being said, public SoCs are loser to 1.8 than 1, so idk about the whole "1.8 is overrated". Because if the total SoC is closer to 1.8 than 1....

PLEASE, inform me into what silly things I missed due to me being the idiot that I am.
< Previous Post in ThreadNext Post in Thread >
TopicPosted ByDate
Intel's Process Roadmap to 2025: with 4nm, 3nm, 20A and 18A?!Kester L2021/07/27 08:29 AM
  Intel's Process Roadmap to 2025: with 4nm, 3nm, 20A and 18A?!Blue2021/07/27 09:15 AM
    Intel's Process Roadmap to 2025: with 4nm, 3nm, 20A and 18A?!James2021/07/29 02:52 PM
      Intel's Process Roadmap to 2025: with 4nm, 3nm, 20A and 18A?!Doug S2021/07/29 05:44 PM
        TSMC "7nm" to "5nm" shrinkageHeikki Kultala2021/07/29 11:18 PM
          TSMC "7nm" to "5nm" shrinkage---2021/07/30 09:38 AM
            TSMC "7nm" to "5nm" shrinkageHeikki Kultala2021/07/30 02:33 PM
              Non-uniform shrinkingDavid Kanter2021/08/04 08:53 AM
          TSMC "7nm" to "5nm" shrinkageDoug S2021/07/30 11:01 AM
            TSMC "7nm" to "5nm" shrinkageDavid Kanter2021/07/30 01:52 PM
              TSMC "7nm" to "5nm" shrinkage---2021/07/31 06:23 PM
                SRAM assist for FinFETsDavid Kanter2021/08/04 08:58 AM
                  SRAM assist for FinFETsAdrian2021/08/04 10:27 PM
              TSMC "7nm" to "5nm" shrinkageDoug S2021/08/05 09:19 AM
                TSMC "7nm" to "5nm" shrinkageDavid Kanter2021/08/05 11:08 AM
                  TSMC "7nm" to "5nm" shrinkage---2021/08/05 04:14 PM
            This has nothing to do with AppleHeikki Kultala2021/07/31 12:05 AM
              on types of cellsblue2021/07/31 11:34 AM
                on types of cellsNoSpammer2021/08/02 07:39 AM
                  on types of cellsme2021/08/03 07:13 AM
      Intel's Process Roadmap to 2025: with 4nm, 3nm, 20A and 18A?!gallier22021/07/30 12:35 AM
  Intel's Process Roadmap to 2025: with 4nm, 3nm, 20A and 18A?!Andrey2021/07/27 12:33 PM
    Intel's Process Roadmap to 2025: with 4nm, 3nm, 20A and 18A?!Maxwell2021/07/27 02:34 PM
      Intel's Process Roadmap to 2025: with 4nm, 3nm, 20A and 18A?!anonymou52021/07/27 05:17 PM
        simple: marketingDaniel Bela Bizo2021/07/28 06:03 AM
  Intel's Process Roadmap to 2025: with 4nm, 3nm, 20A and 18A?!David Kanter2021/07/28 03:37 PM
Reply to this Topic
Name:
Email:
Topic:
Body: No Text
How do you spell tangerine? ūüćä