Alder Lake: 1st Intel/AMD CPU with 6 instruction decoders

By: Adrian (a.delete@this.acm.org), August 19, 2021 6:21 am
Room: Moderated Discussions


From the details released now about Alder Lake, the most significant seems to be that Intel has finally passed from 4 instruction decoders to 6 instruction decoders.


Alder Lake also now matches Zen 3 with 8 instructions fetched per cycle from the uop cache.


This was somewhat expected, because otherwise the increase in IPC announced by Intel would have been very hard to achieve, but now it is confirmed.


https://www.anandtech.com/show/16881/a-deep-dive-into-intels-alder-lake-microarchitectures


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Alder Lake: 1st Intel/AMD CPU with 6 instruction decodersAdrian2021/08/19 06:21 AM
  Alder Lake: the Intel presentationAdrian2021/08/19 06:33 AM
    Intel Mount Evans with 16 ARM Neoverse N1 coresAdrian2021/08/19 06:50 AM
      No AVX-512?me2021/08/19 07:05 AM
        No AVX-512?Adrian2021/08/19 07:40 AM
          No AVX-512?me2021/08/19 07:48 AM
            No AVX-512?Adrian2021/08/19 08:01 AM
              No AVX-512?Michael S2021/08/19 08:07 AM
                No AVX-512?Adrian2021/08/19 08:11 AM
              No AVX-512?me2021/08/19 08:16 AM
                No AVX-512?Adrian2021/08/19 08:48 AM
                  No AVX-512?me2021/08/19 11:41 AM
                    No AVX-512?Adrian2021/08/19 12:32 PM
                      No AVX-512?me2021/08/19 01:00 PM
              No AVX-512?yangrq2021/08/19 01:02 PM
                No AVX-512?Adrian2021/08/19 01:37 PM
                  No AVX-512?me2021/08/19 03:46 PM
                    No AVX-512?Adrian2021/08/19 10:22 PM
                      No AVX-512?yangrq2021/08/19 11:05 PM
                      No AVX-512?me2021/08/20 04:16 AM
              No AVX-512?Robert Williams2021/08/20 08:23 AM
              No AVX-512?David Hess2021/08/20 10:43 AM
                No AVX-512?me2021/08/20 12:09 PM
                  No AVX-512?David Hess2021/08/20 12:29 PM
                    No AVX-512?me2021/08/20 05:36 PM
                      No AVX-512?David Hess2021/08/26 08:28 PM
                        No AVX-512?Andrey2021/08/27 04:08 AM
                        No AVX-512?me2021/08/27 04:09 PM
                          No AVX-512?David Hess2021/08/28 10:32 AM
                            No AVX-512?Linus Torvalds2021/08/28 12:15 PM
                              Multithreading vs. SIMDAndrey2021/08/28 01:21 PM
                                Multithreading vs. SIMDrwessel2021/08/28 03:44 PM
                                Multithreading vs. SIMDLinus Torvalds2021/08/28 04:18 PM
                                  Multithreading vs. SIMD-.-2021/08/28 06:44 PM
                                  Multithreading vs. SIMDAndrey2021/08/28 07:31 PM
                                    Multithreading vs. SIMDAdrian2021/08/28 09:34 PM
                                    Multithreading vs. SIMDJukka Larja2021/08/29 01:22 AM
                                      Multithreading vs. SIMDAndrey2021/08/29 02:10 AM
                                      Multithreading vs. SIMDMichael S2021/08/29 02:56 AM
                                    Multithreading vs. SIMDLinus Torvalds2021/08/29 10:24 AM
                                      Multithreading vs. SIMDme2021/08/29 11:12 AM
                                      Multithreading vs. SIMDJörn Engel2021/08/29 01:50 PM
                                        Multithreading vs. SIMD-.-2021/08/29 03:31 PM
                                  Multithreading vs. SIMDAdrian2021/08/28 09:18 PM
                                  Multithreading vs. SIMDMichael S2021/08/29 02:13 AM
                                Litle cores also give more threads/areaHeikki Kultala2021/08/29 01:18 AM
                              No AVX-512?Adrian2021/08/28 09:12 PM
                              No AVX-512?Doug S2021/08/29 07:32 AM
                                No AVX-512?Adrian2021/08/29 11:17 AM
                                  No AVX-512?Romain Dolbeau2021/08/30 12:49 AM
          AVX512, and 256b subsetsDavid Kanter2021/08/22 11:53 AM
        So just use AVX2?anonymous22021/08/20 05:40 PM
          So just use AVX2?Laurence Parry2021/08/20 06:45 PM
          So just use AVX2?Jörn Engel2021/08/21 09:24 AM
          So just use AVX2?Heikki Kultala2021/08/21 01:36 PM
            So just use AVX2?Michael S2021/08/21 02:58 PM
            So just use AVX2?None2021/08/22 02:42 AM
              So just use AVX2?Michael S2021/08/22 03:21 AM
                So just use AVX2?None2021/08/22 05:31 AM
                  So just use AVX2?Michael S2021/08/22 12:06 PM
      Intel Mount Evans with 16 ARM Neoverse N1 coresMichael S2021/08/19 07:41 AM
        Intel Mount Evans with 16 ARM Neoverse N1 coresAdrian2021/08/19 07:49 AM
      Intel Mount Evans with 16 ARM Neoverse N1 coresBeastian2021/08/19 07:53 AM
    Gracemont efficiencyAdrian2021/08/20 12:07 AM
      Gracemont efficiencyFoo_2021/08/21 07:46 AM
        Gracemont efficiencyrwessel2021/08/21 09:56 AM
          Gracemont efficiencyFoo_2021/08/21 10:07 AM
          Gracemont efficiencyDavid Hess2021/08/27 02:16 AM
        Gracemont efficiency---2021/08/21 09:57 AM
          Gracemont efficiencyDavid Hess2021/08/27 02:25 AM
        Gracemont efficiencyAdrian2021/08/21 10:33 AM
          Gracemont efficiencyGroo2021/08/21 11:39 AM
            Gracemont efficiencyme2021/08/21 12:13 PM
              Gracemont efficiencyMichael S2021/08/21 12:49 PM
                Gracemont efficiencyme2021/08/21 01:12 PM
                Gracemont efficiencyGroo2021/08/21 03:29 PM
              Gracemont efficiencyAdrian2021/08/21 01:08 PM
                Gracemont efficiencysylt2021/08/22 01:25 AM
                  Gracemont efficiencyAdrian2021/08/22 04:18 AM
                    Gracemont efficiencyrwessel2021/08/22 07:31 AM
                      Gracemont efficiencyJukka Larja2021/08/22 08:45 AM
                        Gracemont efficiencyGabriele Svelto2021/08/23 09:44 AM
                          Gracemont efficiencygallier22021/08/24 07:29 AM
                            Gracemont efficiencyGabriele Svelto2021/08/25 12:40 AM
                              Gracemont efficiencygallier22021/08/25 01:40 PM
                    Gracemont efficiencyGabriele Svelto2021/08/23 01:47 AM
                      Gracemont efficiencysylt2021/08/23 01:26 PM
                        Gracemont efficiency---2021/08/23 02:19 PM
                  Gracemont efficiencyDoug S2021/08/22 07:45 AM
                  Gracemont efficiencyJukka Larja2021/08/22 08:44 AM
                    Gracemont efficiencyAdrian2021/08/22 09:33 AM
            Gracemont efficiencyAdrian2021/08/21 12:47 PM
  Alder Lake: 1st Intel/AMD CPU with 6 instruction decodersLinus Torvalds2021/08/19 05:36 PM
    Alder Lake: 1st Intel/AMD CPU with 6 instruction decodersAdrian2021/08/19 10:29 PM
      Alder Lake: 1st Intel/AMD CPU with 6 instruction decodersMark Roulo2021/08/20 10:19 AM
        Alder Lake: 1st Intel/AMD CPU with 6 instruction decodersLinus Torvalds2021/08/20 11:12 AM
        Alder Lake: 1st Intel/AMD CPU with 6 instruction decodersAdrian2021/08/20 01:00 PM
          Alder Lake: 1st Intel/AMD CPU with 6 instruction decodersLinus Torvalds2021/08/20 01:38 PM
  32B pre-decode probably more importantDavid Kanter2021/08/21 08:56 PM
    32B pre-decode probably more importantAdrian2021/08/22 04:52 AM
    32B pre-decode probably more importantMark Roulo2021/08/22 09:06 AM
      32B pre-decode probably more importantLinus Torvalds2021/08/22 11:07 AM
      32B pre-decode probably more importantDoug S2021/08/22 02:20 PM
        32B pre-decode probably more importantme2021/08/22 06:34 PM
          32B pre-decode probably more importantJukka Larja2021/08/23 06:46 AM
            32B pre-decode probably more importantme2021/08/23 05:33 PM
              32B pre-decode probably more importantJukka Larja2021/08/24 06:47 AM
        32B pre-decode probably more importantMark Roulo2021/08/23 07:48 AM
          32B pre-decode probably more importantMatt Sayler2021/08/23 10:59 AM
          32B pre-decode probably more importantDoug S2021/08/23 11:14 AM
        32B pre-decode probably more importantCarson2021/08/24 11:45 PM
          32B pre-decode probably more importantDoug S2021/08/25 11:32 AM
            32B pre-decode probably more importantCarson2021/08/25 11:31 PM
              32B pre-decode probably more importantJukka Larja2021/08/26 05:39 AM
                32B pre-decode probably more importantAdrian2021/08/26 05:54 AM
                  32B pre-decode probably more importantCarson2021/08/27 03:26 AM
              32B pre-decode probably more importantDoug S2021/08/26 11:34 AM
                32B pre-decode probably more importantCarson2021/08/27 03:22 AM
                  32B pre-decode probably more importantAndrey2021/08/27 06:25 AM
                    32B pre-decode probably more importantDoug S2021/08/27 10:08 AM
                      32B pre-decode probably more importantAdrian2021/08/27 10:42 AM
                    Intel 22 nm - 10 nmMark Roulo2021/08/27 10:47 AM
                      Intel 22 nm - 10 nmme2021/08/27 11:43 AM
                        Intel 22 nm - 10 nmAndrey2021/08/27 12:03 PM
                      Intel 22 nm - 10 nmGroo2021/08/27 09:02 PM
                  32B pre-decode probably more importantDavid Hess2021/08/28 11:45 AM
          32B pre-decode probably more importantDavid Kanter2021/08/25 01:57 PM
            32B pre-decode probably more important---2021/08/25 04:12 PM
              32B pre-decode probably more importantDoug S2021/08/25 08:45 PM
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