Jon (no.delete@this.no.com) on August 19, 2021 7:49 am wrote:
> I just noticed that Intel had its arch day today.
>
>
> I remember that for years when Broadwell was introduced we had lengthy arguments over that theoretical
> x86 IPC wall. Some attributed Intel's lackluster IPC improvements to a theoretical IPC wall of
> the x86 ISA. Others simply argued that Intel was holding back due to lack of sufficient competition.
> Now that know Golden Cove does another 1.2x IPC, it brings the number to 1.45x IPC improvement
> over Skylake in single thread integer workload. Given that's more/about what Intel did from Sandy
> Bridge to Skylake, it sure feels like they were simply holding back?
>
>
>
> details of Golden Cove:
>
> https://www.anandtech.com/show/16881/a-deep-dive-into-intels-alder-lake-microarchitectures/3
> https://fuse.wikichip.org/news/6111/intel-details-golden-cove-next-generation-big-core-for-client-and-server-socs/

I'm pretty certain they were, it's the obvious thing to do in their position.
However I don't think they were holding back to some extreme extent as they didn't want AMD to grow to be a danger. And also I think they were held back by design, software and hardware problems in designing and simulating processors. Recently these problems have eased to quite an extent - you can see the effect in how for instance RISC-V processors can be specified and implemented much more readily. And of course one can fit more on chips nowadays.