Jon (no.delete@this.no.com) on August 19, 2021 7:49 am wrote:

> I remember that for years when Broadwell was introduced we had lengthy arguments over that theoretical
> x86 IPC wall. Some attributed Intel's lackluster IPC improvements to a theoretical IPC wall of
> the x86 ISA. Others simply argued that Intel was holding back due to lack of sufficient competition.
> Now that know Golden Cove does another 1.2x IPC, it brings the number to 1.45x IPC improvement
> over Skylake in single thread integer workload. Given that's more/about what Intel did from Sandy
> Bridge to Skylake, it sure feels like they were simply holding back?

Are you saying they were 'holding back' in the Broadwell days, or in the post-Skylake period?

Sandy Bridge was released in early 2011: Skylake in mid 2015. If we assume that the improvement from Sandy Bridge to Skylake is similar to the improvement from Skylake to Golden Cove, then the rate of improvement has slowed (which isn't surprising).

Or, to put it another way, Intel architects weren't delayed by the 10 nm problems: we just couldn't see what they'd been doing. Ice Lake / Rocket Lake / Golden Cove are the products of years of work finally getting to market, which is why the improvement feels big.