Virtually tagged L1-caches

By: dmcq (, September 12, 2021 1:22 pm
Room: Moderated Discussions
sr ( on September 12, 2021 9:48 am wrote:
> dmcq ( on September 12, 2021 8:44 am wrote:
> > What I was talking about is a VIVT system which does not require any TLB access if data is in
> > L1. You need the TLB flags of course and using an inclusive L2 system make it all easier. You'd
> > have extra loads of L1 for shared data when going between processes, but the cache can be designed
> > without needing to take any account of page sizes so aliasing within a process is reduced. There
> > is no problem about memory coherence because there is only one copy of data in L1. I hope we're
> > not talking too much at cross purposes. MESI is more the concern of L2 here.
> Data in L1 cache can be accessed VIVT from core if it has virtual tags.
> But every cache line also needs physical tags for coherence system.
> If you have system being able to do only single-threading per process you only need to take
> care of aliasing lines between different address spaces. But as today every system is also being
> able to do simultaneous multithreading in same address space that same virtual address and its
> data could been shared between many cores, so that data can exist in many L1 caches.
> SMP-system with memory coherence with strict store-allocate (store is permitted only to exclusive
> state cache line) guarantees that every byte read from memory is in every clock cycle in coherent
> state. If your core A writes byte Y to address X in the same or next clock cycle any other core
> reading from address X from memory will get that byte Y as result.( it does not guarantee that
> cpus are in coherent state - data can be read from CPU buffers instead of cache and be out of sync
> - but properly done code flushing cpu buffers(atomic instructions should do) and so on can be made
> bug-free.) It also prevents two cores from writing to same cache line at same time.
> That memory coherence is strict requirement for any sane SMP-system. x86 and less
> strict memory ordering rule systems all use it. TSO instead isn't bringing any real
> effect on coherence, it only can make bugs from buggy code to be less frequent.
> And being able to make that memory coherence every cache line in system needs all time visible
> full address space physical tags. That makes possible that all memory mapped in system can
> be controlled via one address space instead of programs many virtual address spaces.

I'm afraid I'm finding it hard to follow you. SMT would give some problems with what I was talking about but not SMP. With an inclusive L2 one only needs an index into L2 not a full physical address, the L2 could hold the full address, that isn't much of a problem one way or the other though. You seem to be trying to explain memory coherence to me, what is it I said that makes you think I am misunderstanding something about it?
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TopicPosted ByDate
POWER10 SAP SD benchmarkanon22021/09/06 03:36 PM
  POWER10 SAP SD benchmarkDaniel B2021/09/07 02:31 AM
    "Cores" (and SPEC)Rayla2021/09/07 07:51 AM
      "Cores" (and SPEC)anon2021/09/07 03:56 PM
  POWER10 SAP SD benchmarkAnon2021/09/07 03:24 PM
    POWER10 SAP SD benchmarkAnon2021/09/07 03:27 PM
  Virtually tagged L1-cachessr2021/09/08 05:49 AM
    Virtually tagged L1-cachesdmcq2021/09/08 08:22 AM
      Virtually tagged L1-cachessr2021/09/08 08:56 AM
      Virtually tagged L1-cachesHugo Décharnes2021/09/08 08:58 AM
        Virtually tagged L1-cachessr2021/09/08 10:09 AM
          Virtually tagged L1-cachesHugo Décharnes2021/09/08 10:46 AM
            Virtually tagged L1-cachessr2021/09/08 11:35 AM
              Virtually tagged L1-cachesHugo Décharnes2021/09/08 12:23 PM
                Virtually tagged L1-cachessr2021/09/08 12:40 PM
                  Virtually tagged L1-cachesanon2021/09/09 03:16 AM
                    Virtually tagged L1-cachesKonrad Schwarz2021/09/10 05:19 AM
                      Virtually tagged L1-cachesHugo Décharnes2021/09/10 06:59 AM
                        Virtually tagged L1-cachesanon2021/09/14 03:17 AM
                          Virtually tagged L1-cachesdmcq2021/09/14 09:34 AM
                            Or use a PLB (NT)Paul A. Clayton2021/09/14 09:45 AM
                              Or use a PLBLinus Torvalds2021/09/14 03:27 PM
                                Or use a PLBanon2021/09/15 12:15 AM
                                  Or use a PLBMichael S2021/09/15 03:21 AM
                                    Or use a PLBdmcq2021/09/15 03:42 PM
                                      Or use a PLBKonrad Schwarz2021/09/16 04:24 AM
                                        Or use a PLBMichael S2021/09/16 10:13 AM
                                          Or use a PLB---2021/09/16 01:02 PM
                                  PLB referencePaul A. Clayton2021/09/18 02:35 PM
                                    PLB referenceMichael S2021/09/18 04:14 PM
                                      Demand paging/translation orthogonalPaul A. Clayton2021/09/19 07:33 AM
                                        Demand paging/translation orthogonalMichael S2021/09/19 09:10 AM
                                      PLB referenceCarson2021/09/20 10:19 PM
                                    PLB referencesr2021/09/20 06:02 AM
                                      PLB referenceMichael S2021/09/20 07:03 AM
                                        PLB referenceLinus Torvalds2021/09/20 12:10 PM
                                  Or use a PLBsr2021/09/20 04:32 AM
                              Or use a PLBsr2021/09/21 09:36 AM
                                Or use a PLBLinus Torvalds2021/09/21 10:04 AM
                                  Or use a PLBsr2021/09/21 10:48 AM
                                    Or use a PLBLinus Torvalds2021/09/21 01:55 PM
                                      Or use a PLBsr2021/09/22 06:55 AM
                                        Or use a PLBrwessel2021/09/22 07:09 AM
                                        Or use a PLBLinus Torvalds2021/09/22 11:50 AM
                                          Or use a PLBsr2021/09/22 01:00 PM
                                            Or use a PLBdmcq2021/09/22 04:07 PM
                                            Or use a PLBEtienne Lorrain2021/09/23 08:50 AM
                                          Or use a PLBanon22021/09/22 04:09 PM
                                            Or use a PLBdmcq2021/09/23 02:35 AM
                                          Or use a PLB2021/09/23 09:37 AM
                                            Or use a PLBLinus Torvalds2021/09/23 12:01 PM
                                              Or use a PLBgpd2021/09/24 03:59 AM
                                                Or use a PLBLinus Torvalds2021/09/24 10:45 AM
                                                  Or use a PLBdmcq2021/09/24 12:43 PM
                                                  Or use a PLBsr2021/09/25 10:19 AM
                                                    Or use a PLBLinus Torvalds2021/09/25 10:44 AM
                                                      Or use a PLBsr2021/09/25 11:11 AM
                                                        Or use a PLBLinus Torvalds2021/09/25 11:31 AM
                                                          Or use a PLBsr2021/09/25 11:52 AM
                                                            Or use a PLBLinus Torvalds2021/09/25 12:05 PM
                                                              Or use a PLBsr2021/09/25 12:23 PM
                                                                Or use a PLBrwessel2021/09/25 03:29 PM
                                                                  Or use a PLBsr2021/10/01 12:22 AM
                                                                    Or use a PLBrwessel2021/10/01 06:19 AM
                                                                      Or use a PLBDavid Hess2021/10/01 10:35 AM
                                                                        Or use a PLBrwessel2021/10/02 04:47 AM
                                                                      Or use a PLBsr2021/10/02 11:16 AM
                                                                        Or use a PLBrwessel2021/10/02 11:53 AM
                                                          Or use a PLBLinus Torvalds2021/09/25 11:57 AM
                                                            Or use a PLBsr2021/09/25 12:07 PM
                                                              Or use a PLBLinus Torvalds2021/09/25 12:21 PM
                                                                Or use a PLBsr2021/09/25 12:40 PM
                                                                  Or use a PLBnksingh2021/09/27 09:07 AM
                                                          Or use a PLB2021/09/27 09:02 AM
                                                            Or use a PLBLinus Torvalds2021/09/27 10:20 AM
                                                              Or use a PLBLinus Torvalds2021/09/27 12:58 PM
                                                                Or use a PLBdmcq2021/09/28 10:59 AM
                                              Or use a PLBsr2021/09/25 10:34 AM
                                                Or use a PLBrwessel2021/09/25 03:44 PM
                                                  Or use a PLBsr2021/10/01 01:04 AM
                                                    Or use a PLBrwessel2021/10/01 06:33 AM
                                                      I386 segmentation highlightssr2021/10/04 07:53 AM
                                                        I386 segmentation highlightsAdrian2021/10/04 09:53 AM
                                                          I386 segmentation highlightssr2021/10/04 10:19 AM
                                                        I386 segmentation highlightsrwessel2021/10/04 04:57 PM
                                                          I386 segmentation highlightssr2021/10/05 11:16 AM
                                                            I386 segmentation highlightsMichael S2021/10/05 12:27 PM
                                                            I386 segmentation highlightsrwessel2021/10/05 04:20 PM
                                                Or use a PLBJohnG2021/09/25 10:18 PM
                                              Or use a PLB2021/09/27 07:37 AM
                                                Or use a PLBHeikki Kultala2021/09/28 03:53 AM
                                                  Or use a PLBrwessel2021/09/28 07:29 AM
                                        Or use a PLBDavid Hess2021/09/23 06:00 PM
                                          Or use a PLBAdrian2021/09/24 01:21 AM
                                            Or use a PLBdmcq2021/09/25 12:41 PM
                                        Or use a PLBblaine2021/09/26 11:19 PM
                                          Or use a PLBDavid Hess2021/09/27 11:35 AM
                                            Or use a PLBblaine2021/09/27 05:19 PM
                                            Or use a PLBAdrian2021/09/27 10:40 PM
                                              Or use a PLBAdrian2021/09/27 10:59 PM
                                                Or use a PLBdmcq2021/09/28 07:45 AM
                                              Or use a PLBrwessel2021/09/28 07:45 AM
                                              Or use a PLBDavid Hess2021/09/28 12:50 PM
                                                Or use a PLBEtienne Lorrain2021/09/30 01:25 AM
                                                  Or use a PLBDavid Hess2021/10/01 10:40 AM
                                  MMU privilegessr2021/09/21 11:07 AM
                                    MMU privilegesLinus Torvalds2021/09/21 01:49 PM
                            Virtually tagged L1-cachesKonrad Schwarz2021/09/16 04:18 AM
                          Virtually tagged L1-cachesCarson2021/09/16 01:12 PM
                            Virtually tagged L1-cachesanon22021/09/16 05:16 PM
                              Virtually tagged L1-cachesrwessel2021/09/16 06:29 PM
                          Virtually tagged L1-cachessr2021/09/20 04:20 AM
              Virtually tagged L1-caches---2021/09/08 02:28 PM
                Virtually tagged L1-cachesanonymou52021/09/08 08:28 PM
                  Virtually tagged L1-cachesanonymou52021/09/08 08:34 PM
                  Virtually tagged L1-caches---2021/09/09 10:14 AM
                    Virtually tagged L1-cachesanonymou52021/09/09 10:44 PM
                Multi-threading?David Kanter2021/09/09 09:32 PM
                  Multi-threading?---2021/09/10 09:19 AM
                Virtually tagged L1-cachessr2021/09/11 01:19 AM
                Virtually tagged L1-cachessr2021/09/11 01:36 AM
                  Virtually tagged L1-caches---2021/09/11 09:53 AM
                    Virtually tagged L1-cachessr2021/09/12 12:43 AM
                      Virtually tagged L1-cachesLinus Torvalds2021/09/12 11:10 AM
                        Virtually tagged L1-cachessr2021/09/12 11:57 AM
                          Virtually tagged L1-cachesdmcq2021/09/13 08:31 AM
                            Virtually tagged L1-cachessr2021/09/20 04:11 AM
            Virtually tagged L1-cachessr2021/09/11 02:49 AM
      Virtually tagged L1-cachesLinus Torvalds2021/09/08 12:34 PM
        Virtually tagged L1-cachesdmcq2021/09/09 02:46 AM
          Virtually tagged L1-cachesdmcq2021/09/09 02:58 AM
          Virtually tagged L1-cachessr2021/09/11 01:29 AM
            Virtually tagged L1-cachesdmcq2021/09/11 08:59 AM
              Virtually tagged L1-cachessr2021/09/12 12:57 AM
                Virtually tagged L1-cachesdmcq2021/09/12 08:44 AM
                  Virtually tagged L1-cachessr2021/09/12 09:48 AM
                    Virtually tagged L1-cachesdmcq2021/09/12 01:22 PM
                      Virtually tagged L1-cachessr2021/09/20 04:40 AM
    Where do you see this information? (NT)anon22021/09/09 02:45 AM
      Where do you see this information?sr2021/09/11 01:40 AM
        Where do you see this information?anon22021/09/11 01:53 AM
          Where do you see this information?sr2021/09/11 02:08 AM
            Thank you (NT)anon22021/09/11 04:31 PM
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