Virtually tagged L1-caches

By: dmcq (dmcq.delete@this.fano.co.uk), September 12, 2021 12:22 pm
Room: Moderated Discussions
sr (nobody.delete@this.nowhere.com) on September 12, 2021 9:48 am wrote:
> dmcq (dmcq.delete@this.fano.co.uk) on September 12, 2021 8:44 am wrote:
>
> > What I was talking about is a VIVT system which does not require any TLB access if data is in
> > L1. You need the TLB flags of course and using an inclusive L2 system make it all easier. You'd
> > have extra loads of L1 for shared data when going between processes, but the cache can be designed
> > without needing to take any account of page sizes so aliasing within a process is reduced. There
> > is no problem about memory coherence because there is only one copy of data in L1. I hope we're
> > not talking too much at cross purposes. MESI is more the concern of L2 here.
>
>
> Data in L1 cache can be accessed VIVT from core if it has virtual tags.
> But every cache line also needs physical tags for coherence system.
>
>
> If you have system being able to do only single-threading per process you only need to take
> care of aliasing lines between different address spaces. But as today every system is also being
> able to do simultaneous multithreading in same address space that same virtual address and its
> data could been shared between many cores, so that data can exist in many L1 caches.
>
>
> SMP-system with memory coherence with strict store-allocate (store is permitted only to exclusive
> state cache line) guarantees that every byte read from memory is in every clock cycle in coherent
> state. If your core A writes byte Y to address X in the same or next clock cycle any other core
> reading from address X from memory will get that byte Y as result.( it does not guarantee that
> cpus are in coherent state - data can be read from CPU buffers instead of cache and be out of sync
> - but properly done code flushing cpu buffers(atomic instructions should do) and so on can be made
> bug-free.) It also prevents two cores from writing to same cache line at same time.
>
> That memory coherence is strict requirement for any sane SMP-system. x86 and less
> strict memory ordering rule systems all use it. TSO instead isn't bringing any real
> effect on coherence, it only can make bugs from buggy code to be less frequent.
>
> And being able to make that memory coherence every cache line in system needs all time visible
> full address space physical tags. That makes possible that all memory mapped in system can
> be controlled via one address space instead of programs many virtual address spaces.

I'm afraid I'm finding it hard to follow you. SMT would give some problems with what I was talking about but not SMP. With an inclusive L2 one only needs an index into L2 not a full physical address, the L2 could hold the full address, that isn't much of a problem one way or the other though. You seem to be trying to explain memory coherence to me, what is it I said that makes you think I am misunderstanding something about it?
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TopicPosted ByDate
POWER10 SAP SD benchmarkanon22021/09/06 02:36 PM
  POWER10 SAP SD benchmarkDaniel B2021/09/07 01:31 AM
    "Cores" (and SPEC)Rayla2021/09/07 06:51 AM
      "Cores" (and SPEC)anon2021/09/07 02:56 PM
  POWER10 SAP SD benchmarkAnon2021/09/07 02:24 PM
    POWER10 SAP SD benchmarkAnon2021/09/07 02:27 PM
  Virtually tagged L1-cachessr2021/09/08 04:49 AM
    Virtually tagged L1-cachesdmcq2021/09/08 07:22 AM
      Virtually tagged L1-cachessr2021/09/08 07:56 AM
      Virtually tagged L1-cachesHugo Décharnes2021/09/08 07:58 AM
        Virtually tagged L1-cachessr2021/09/08 09:09 AM
          Virtually tagged L1-cachesHugo Décharnes2021/09/08 09:46 AM
            Virtually tagged L1-cachessr2021/09/08 10:35 AM
              Virtually tagged L1-cachesHugo Décharnes2021/09/08 11:23 AM
                Virtually tagged L1-cachessr2021/09/08 11:40 AM
                  Virtually tagged L1-cachesanon2021/09/09 02:16 AM
                    Virtually tagged L1-cachesKonrad Schwarz2021/09/10 04:19 AM
                      Virtually tagged L1-cachesHugo Décharnes2021/09/10 05:59 AM
                        Virtually tagged L1-cachesanon2021/09/14 02:17 AM
                          Virtually tagged L1-cachesdmcq2021/09/14 08:34 AM
                            Or use a PLB (NT)Paul A. Clayton2021/09/14 08:45 AM
                              Or use a PLBLinus Torvalds2021/09/14 02:27 PM
                                Or use a PLBanon2021/09/14 11:15 PM
                                  Or use a PLBMichael S2021/09/15 02:21 AM
                                    Or use a PLBdmcq2021/09/15 02:42 PM
                                      Or use a PLBKonrad Schwarz2021/09/16 03:24 AM
                                        Or use a PLBMichael S2021/09/16 09:13 AM
                                          Or use a PLB---2021/09/16 12:02 PM
                                  PLB referencePaul A. Clayton2021/09/18 01:35 PM
                                    PLB referenceMichael S2021/09/18 03:14 PM
                                      Demand paging/translation orthogonalPaul A. Clayton2021/09/19 06:33 AM
                                        Demand paging/translation orthogonalMichael S2021/09/19 08:10 AM
                                      PLB referenceCarson2021/09/20 09:19 PM
                                    PLB referencesr2021/09/20 05:02 AM
                                      PLB referenceMichael S2021/09/20 06:03 AM
                                        PLB referenceLinus Torvalds2021/09/20 11:10 AM
                                  Or use a PLBsr2021/09/20 03:32 AM
                              Or use a PLBsr2021/09/21 08:36 AM
                                Or use a PLBLinus Torvalds2021/09/21 09:04 AM
                                  Or use a PLBsr2021/09/21 09:48 AM
                                    Or use a PLBLinus Torvalds2021/09/21 12:55 PM
                                      Or use a PLBsr2021/09/22 05:55 AM
                                        Or use a PLBrwessel2021/09/22 06:09 AM
                                        Or use a PLBLinus Torvalds2021/09/22 10:50 AM
                                          Or use a PLBsr2021/09/22 12:00 PM
                                            Or use a PLBdmcq2021/09/22 03:07 PM
                                            Or use a PLBEtienne Lorrain2021/09/23 07:50 AM
                                          Or use a PLBanon22021/09/22 03:09 PM
                                            Or use a PLBdmcq2021/09/23 01:35 AM
                                          Or use a PLB2021/09/23 08:37 AM
                                            Or use a PLBLinus Torvalds2021/09/23 11:01 AM
                                              Or use a PLBgpd2021/09/24 02:59 AM
                                                Or use a PLBLinus Torvalds2021/09/24 09:45 AM
                                                  Or use a PLBdmcq2021/09/24 11:43 AM
                                                  Or use a PLBsr2021/09/25 09:19 AM
                                                    Or use a PLBLinus Torvalds2021/09/25 09:44 AM
                                                      Or use a PLBsr2021/09/25 10:11 AM
                                                        Or use a PLBLinus Torvalds2021/09/25 10:31 AM
                                                          Or use a PLBsr2021/09/25 10:52 AM
                                                            Or use a PLBLinus Torvalds2021/09/25 11:05 AM
                                                              Or use a PLBsr2021/09/25 11:23 AM
                                                                Or use a PLBrwessel2021/09/25 02:29 PM
                                                                  Or use a PLBsr2021/09/30 11:22 PM
                                                                    Or use a PLBrwessel2021/10/01 05:19 AM
                                                                      Or use a PLBDavid Hess2021/10/01 09:35 AM
                                                                        Or use a PLBrwessel2021/10/02 03:47 AM
                                                                      Or use a PLBsr2021/10/02 10:16 AM
                                                                        Or use a PLBrwessel2021/10/02 10:53 AM
                                                          Or use a PLBLinus Torvalds2021/09/25 10:57 AM
                                                            Or use a PLBsr2021/09/25 11:07 AM
                                                              Or use a PLBLinus Torvalds2021/09/25 11:21 AM
                                                                Or use a PLBsr2021/09/25 11:40 AM
                                                                  Or use a PLBnksingh2021/09/27 08:07 AM
                                                          Or use a PLB2021/09/27 08:02 AM
                                                            Or use a PLBLinus Torvalds2021/09/27 09:20 AM
                                                              Or use a PLBLinus Torvalds2021/09/27 11:58 AM
                                                                Or use a PLBdmcq2021/09/28 09:59 AM
                                              Or use a PLBsr2021/09/25 09:34 AM
                                                Or use a PLBrwessel2021/09/25 02:44 PM
                                                  Or use a PLBsr2021/10/01 12:04 AM
                                                    Or use a PLBrwessel2021/10/01 05:33 AM
                                                      I386 segmentation highlightssr2021/10/04 06:53 AM
                                                        I386 segmentation highlightsAdrian2021/10/04 08:53 AM
                                                          I386 segmentation highlightssr2021/10/04 09:19 AM
                                                        I386 segmentation highlightsrwessel2021/10/04 03:57 PM
                                                          I386 segmentation highlightssr2021/10/05 10:16 AM
                                                            I386 segmentation highlightsMichael S2021/10/05 11:27 AM
                                                            I386 segmentation highlightsrwessel2021/10/05 03:20 PM
                                                Or use a PLBJohnG2021/09/25 09:18 PM
                                              Or use a PLB2021/09/27 06:37 AM
                                                Or use a PLBHeikki Kultala2021/09/28 02:53 AM
                                                  Or use a PLBrwessel2021/09/28 06:29 AM
                                        Or use a PLBDavid Hess2021/09/23 05:00 PM
                                          Or use a PLBAdrian2021/09/24 12:21 AM
                                            Or use a PLBdmcq2021/09/25 11:41 AM
                                        Or use a PLBblaine2021/09/26 10:19 PM
                                          Or use a PLBDavid Hess2021/09/27 10:35 AM
                                            Or use a PLBblaine2021/09/27 04:19 PM
                                            Or use a PLBAdrian2021/09/27 09:40 PM
                                              Or use a PLBAdrian2021/09/27 09:59 PM
                                                Or use a PLBdmcq2021/09/28 06:45 AM
                                              Or use a PLBrwessel2021/09/28 06:45 AM
                                              Or use a PLBDavid Hess2021/09/28 11:50 AM
                                                Or use a PLBEtienne Lorrain2021/09/30 12:25 AM
                                                  Or use a PLBDavid Hess2021/10/01 09:40 AM
                                  MMU privilegessr2021/09/21 10:07 AM
                                    MMU privilegesLinus Torvalds2021/09/21 12:49 PM
                            Virtually tagged L1-cachesKonrad Schwarz2021/09/16 03:18 AM
                          Virtually tagged L1-cachesCarson2021/09/16 12:12 PM
                            Virtually tagged L1-cachesanon22021/09/16 04:16 PM
                              Virtually tagged L1-cachesrwessel2021/09/16 05:29 PM
                          Virtually tagged L1-cachessr2021/09/20 03:20 AM
              Virtually tagged L1-caches---2021/09/08 01:28 PM
                Virtually tagged L1-cachesanonymou52021/09/08 07:28 PM
                  Virtually tagged L1-cachesanonymou52021/09/08 07:34 PM
                  Virtually tagged L1-caches---2021/09/09 09:14 AM
                    Virtually tagged L1-cachesanonymou52021/09/09 09:44 PM
                Multi-threading?David Kanter2021/09/09 08:32 PM
                  Multi-threading?---2021/09/10 08:19 AM
                Virtually tagged L1-cachessr2021/09/11 12:19 AM
                Virtually tagged L1-cachessr2021/09/11 12:36 AM
                  Virtually tagged L1-caches---2021/09/11 08:53 AM
                    Virtually tagged L1-cachessr2021/09/11 11:43 PM
                      Virtually tagged L1-cachesLinus Torvalds2021/09/12 10:10 AM
                        Virtually tagged L1-cachessr2021/09/12 10:57 AM
                          Virtually tagged L1-cachesdmcq2021/09/13 07:31 AM
                            Virtually tagged L1-cachessr2021/09/20 03:11 AM
            Virtually tagged L1-cachessr2021/09/11 01:49 AM
      Virtually tagged L1-cachesLinus Torvalds2021/09/08 11:34 AM
        Virtually tagged L1-cachesdmcq2021/09/09 01:46 AM
          Virtually tagged L1-cachesdmcq2021/09/09 01:58 AM
          Virtually tagged L1-cachessr2021/09/11 12:29 AM
            Virtually tagged L1-cachesdmcq2021/09/11 07:59 AM
              Virtually tagged L1-cachessr2021/09/11 11:57 PM
                Virtually tagged L1-cachesdmcq2021/09/12 07:44 AM
                  Virtually tagged L1-cachessr2021/09/12 08:48 AM
                    Virtually tagged L1-cachesdmcq2021/09/12 12:22 PM
                      Virtually tagged L1-cachessr2021/09/20 03:40 AM
    Where do you see this information? (NT)anon22021/09/09 01:45 AM
      Where do you see this information?sr2021/09/11 12:40 AM
        Where do you see this information?anon22021/09/11 12:53 AM
          Where do you see this information?sr2021/09/11 01:08 AM
            Thank you (NT)anon22021/09/11 03:31 PM
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