By: Linus Torvalds (torvalds.delete@this.linux-foundation.org), September 25, 2021 11:31 am
Room: Moderated Discussions
sr (nobody.delete@this.nowhere.com) on September 25, 2021 11:11 am wrote:
>
> Am I understand 386 segmentation wrongly? Process have all rights and you
> could segment it pretty much without limits to any wanted slices, dynamically.
> Page size isn't limiting factor, segments can go smaller than pages.
You are wrong in some details, but not in the big picture (*).
But what you are missing is that the i386 segments are very expensive.
They are expensive to set up, they are expensive to load, and they are expensive to use in code (because of the extra segment selector you have to carry atound).
> And about costs -x86 segmentation is basically free.
Not even close.
x86 segmentation is "free" only if you don't actually use them at all, and use only a small fixed set of segments that you can keep in the very limited segment cache (ie the four segment registers, plus CS/SS).
> Yes, modern designs have one cycle additional latency when segment offset is non-zero
> but that's only hardware limitation [..]
No, it's somewhat fundamental.
You are right that you wouldn't have the extra cycle if people used segments with non-zero bases more, but that's not because you can make it go away - that's because you'd just never implement the "zero base" optimization. Instead, you'd be forced to do the base addition every single time, and have it as a cost in the most critical path of the most critical part of your CPU.
But that single-cycle cost (which would be just a partial-cycle FO4 cost if it was done all the time) is the least of the problems.
The much bigger problem - and the much bigger cost - of actually using segments is h ow you have to carry the segment selector around with your pointers, and how you have to load the segmenty registers when using it. Those are the big costs. And they are why nobody uses segmentation.
Once the segment information is cached, it's (almost) "free". But it's only cached if you never use segments, and never switch them around.
And it's entirely useless as a debug functionality. The performance overhead of setting up and using multiple segments, the overhead of passing pointers around as 16-bit selector plus 32-bit offset, that would all be acceptable in a debug build.
But it's completely unacceptable from a software overhead standpoint, and you couldn't reasonably ship that same binary that you used for debugging as a production binary. So the debug code would be something completely different from what you actually run in production, which makes it almost worthless. There are much better models for debugging.
A debug build needs to basically be able to run the same binary without any major changes. So maybe you link in a different malloc() library or something like that. But not the complete code changes that using segments requires.
> I always adored 386's MMU - it really seem to be great achievement.
It's an "achievement" all right.
It took the ungodly garbage that was introduced in the 286, and made it still be usable in a 32-bit environment.
It's a masterclass in backwards compatibility, and it should be admired for that. It made the 386 successful, in that it allowed a seamless upgrade path from one of the worst architectures ever designed, to one that wasn't bad, but can obly be called "baroque" in the details.
So the 386 segmentation was very much what made the architecture. It was hugely important. It was technically the right thing to do at the time, and the 80386 designers should get huge kudos for it. No question about that.
But it should be admired from a distance, and as a warning to others.
Linus
>
> Am I understand 386 segmentation wrongly? Process have all rights and you
> could segment it pretty much without limits to any wanted slices, dynamically.
> Page size isn't limiting factor, segments can go smaller than pages.
You are wrong in some details, but not in the big picture (*).
But what you are missing is that the i386 segments are very expensive.
They are expensive to set up, they are expensive to load, and they are expensive to use in code (because of the extra segment selector you have to carry atound).
> And about costs -x86 segmentation is basically free.
Not even close.
x86 segmentation is "free" only if you don't actually use them at all, and use only a small fixed set of segments that you can keep in the very limited segment cache (ie the four segment registers, plus CS/SS).
> Yes, modern designs have one cycle additional latency when segment offset is non-zero
> but that's only hardware limitation [..]
No, it's somewhat fundamental.
You are right that you wouldn't have the extra cycle if people used segments with non-zero bases more, but that's not because you can make it go away - that's because you'd just never implement the "zero base" optimization. Instead, you'd be forced to do the base addition every single time, and have it as a cost in the most critical path of the most critical part of your CPU.
But that single-cycle cost (which would be just a partial-cycle FO4 cost if it was done all the time) is the least of the problems.
The much bigger problem - and the much bigger cost - of actually using segments is h ow you have to carry the segment selector around with your pointers, and how you have to load the segmenty registers when using it. Those are the big costs. And they are why nobody uses segmentation.
Once the segment information is cached, it's (almost) "free". But it's only cached if you never use segments, and never switch them around.
And it's entirely useless as a debug functionality. The performance overhead of setting up and using multiple segments, the overhead of passing pointers around as 16-bit selector plus 32-bit offset, that would all be acceptable in a debug build.
But it's completely unacceptable from a software overhead standpoint, and you couldn't reasonably ship that same binary that you used for debugging as a production binary. So the debug code would be something completely different from what you actually run in production, which makes it almost worthless. There are much better models for debugging.
A debug build needs to basically be able to run the same binary without any major changes. So maybe you link in a different malloc() library or something like that. But not the complete code changes that using segments requires.
> I always adored 386's MMU - it really seem to be great achievement.
It's an "achievement" all right.
It took the ungodly garbage that was introduced in the 286, and made it still be usable in a 32-bit environment.
It's a masterclass in backwards compatibility, and it should be admired for that. It made the 386 successful, in that it allowed a seamless upgrade path from one of the worst architectures ever designed, to one that wasn't bad, but can obly be called "baroque" in the details.
So the 386 segmentation was very much what made the architecture. It was hugely important. It was technically the right thing to do at the time, and the 80386 designers should get huge kudos for it. No question about that.
But it should be admired from a distance, and as a warning to others.
Linus
Topic | Posted By | Date |
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"Cores" (and SPEC) | anon | 2021/09/07 03:56 PM |
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POWER10 SAP SD benchmark | Anon | 2021/09/07 03:27 PM |
Virtually tagged L1-caches | sr | 2021/09/08 05:49 AM |
Virtually tagged L1-caches | dmcq | 2021/09/08 08:22 AM |
Virtually tagged L1-caches | sr | 2021/09/08 08:56 AM |
Virtually tagged L1-caches | Hugo Décharnes | 2021/09/08 08:58 AM |
Virtually tagged L1-caches | sr | 2021/09/08 10:09 AM |
Virtually tagged L1-caches | Hugo Décharnes | 2021/09/08 10:46 AM |
Virtually tagged L1-caches | sr | 2021/09/08 11:35 AM |
Virtually tagged L1-caches | Hugo Décharnes | 2021/09/08 12:23 PM |
Virtually tagged L1-caches | sr | 2021/09/08 12:40 PM |
Virtually tagged L1-caches | anon | 2021/09/09 03:16 AM |
Virtually tagged L1-caches | Konrad Schwarz | 2021/09/10 05:19 AM |
Virtually tagged L1-caches | Hugo Décharnes | 2021/09/10 06:59 AM |
Virtually tagged L1-caches | anon | 2021/09/14 03:17 AM |
Virtually tagged L1-caches | dmcq | 2021/09/14 09:34 AM |
Or use a PLB (NT) | Paul A. Clayton | 2021/09/14 09:45 AM |
Or use a PLB | Linus Torvalds | 2021/09/14 03:27 PM |
Or use a PLB | anon | 2021/09/15 12:15 AM |
Or use a PLB | Michael S | 2021/09/15 03:21 AM |
Or use a PLB | dmcq | 2021/09/15 03:42 PM |
Or use a PLB | Konrad Schwarz | 2021/09/16 04:24 AM |
Or use a PLB | Michael S | 2021/09/16 10:13 AM |
Or use a PLB | --- | 2021/09/16 01:02 PM |
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PLB reference | Michael S | 2021/09/18 04:14 PM |
Demand paging/translation orthogonal | Paul A. Clayton | 2021/09/19 07:33 AM |
Demand paging/translation orthogonal | Michael S | 2021/09/19 09:10 AM |
PLB reference | Carson | 2021/09/20 10:19 PM |
PLB reference | sr | 2021/09/20 06:02 AM |
PLB reference | Michael S | 2021/09/20 07:03 AM |
PLB reference | Linus Torvalds | 2021/09/20 12:10 PM |
Or use a PLB | sr | 2021/09/20 04:32 AM |
Or use a PLB | sr | 2021/09/21 09:36 AM |
Or use a PLB | Linus Torvalds | 2021/09/21 10:04 AM |
Or use a PLB | sr | 2021/09/21 10:48 AM |
Or use a PLB | Linus Torvalds | 2021/09/21 01:55 PM |
Or use a PLB | sr | 2021/09/22 06:55 AM |
Or use a PLB | rwessel | 2021/09/22 07:09 AM |
Or use a PLB | Linus Torvalds | 2021/09/22 11:50 AM |
Or use a PLB | sr | 2021/09/22 01:00 PM |
Or use a PLB | dmcq | 2021/09/22 04:07 PM |
Or use a PLB | Etienne Lorrain | 2021/09/23 08:50 AM |
Or use a PLB | anon2 | 2021/09/22 04:09 PM |
Or use a PLB | dmcq | 2021/09/23 02:35 AM |
Or use a PLB | ⚛ | 2021/09/23 09:37 AM |
Or use a PLB | Linus Torvalds | 2021/09/23 12:01 PM |
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Or use a PLB | Linus Torvalds | 2021/09/24 10:45 AM |
Or use a PLB | dmcq | 2021/09/24 12:43 PM |
Or use a PLB | sr | 2021/09/25 10:19 AM |
Or use a PLB | Linus Torvalds | 2021/09/25 10:44 AM |
Or use a PLB | sr | 2021/09/25 11:11 AM |
Or use a PLB | Linus Torvalds | 2021/09/25 11:31 AM |
Or use a PLB | sr | 2021/09/25 11:52 AM |
Or use a PLB | Linus Torvalds | 2021/09/25 12:05 PM |
Or use a PLB | sr | 2021/09/25 12:23 PM |
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Or use a PLB | sr | 2021/10/01 12:22 AM |
Or use a PLB | rwessel | 2021/10/01 06:19 AM |
Or use a PLB | David Hess | 2021/10/01 10:35 AM |
Or use a PLB | rwessel | 2021/10/02 04:47 AM |
Or use a PLB | sr | 2021/10/02 11:16 AM |
Or use a PLB | rwessel | 2021/10/02 11:53 AM |
Or use a PLB | Linus Torvalds | 2021/09/25 11:57 AM |
Or use a PLB | sr | 2021/09/25 12:07 PM |
Or use a PLB | Linus Torvalds | 2021/09/25 12:21 PM |
Or use a PLB | sr | 2021/09/25 12:40 PM |
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Or use a PLB | ⚛ | 2021/09/27 09:02 AM |
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Or use a PLB | Linus Torvalds | 2021/09/27 12:58 PM |
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Or use a PLB | sr | 2021/09/25 10:34 AM |
Or use a PLB | rwessel | 2021/09/25 03:44 PM |
Or use a PLB | sr | 2021/10/01 01:04 AM |
Or use a PLB | rwessel | 2021/10/01 06:33 AM |
I386 segmentation highlights | sr | 2021/10/04 07:53 AM |
I386 segmentation highlights | Adrian | 2021/10/04 09:53 AM |
I386 segmentation highlights | sr | 2021/10/04 10:19 AM |
I386 segmentation highlights | rwessel | 2021/10/04 04:57 PM |
I386 segmentation highlights | sr | 2021/10/05 11:16 AM |
I386 segmentation highlights | Michael S | 2021/10/05 12:27 PM |
I386 segmentation highlights | rwessel | 2021/10/05 04:20 PM |
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Or use a PLB | ⚛ | 2021/09/27 07:37 AM |
Or use a PLB | Heikki Kultala | 2021/09/28 03:53 AM |
Or use a PLB | rwessel | 2021/09/28 07:29 AM |
Or use a PLB | David Hess | 2021/09/23 06:00 PM |
Or use a PLB | Adrian | 2021/09/24 01:21 AM |
Or use a PLB | dmcq | 2021/09/25 12:41 PM |
Or use a PLB | blaine | 2021/09/26 11:19 PM |
Or use a PLB | David Hess | 2021/09/27 11:35 AM |
Or use a PLB | blaine | 2021/09/27 05:19 PM |
Or use a PLB | Adrian | 2021/09/27 10:40 PM |
Or use a PLB | Adrian | 2021/09/27 10:59 PM |
Or use a PLB | dmcq | 2021/09/28 07:45 AM |
Or use a PLB | rwessel | 2021/09/28 07:45 AM |
Or use a PLB | David Hess | 2021/09/28 12:50 PM |
Or use a PLB | Etienne Lorrain | 2021/09/30 01:25 AM |
Or use a PLB | David Hess | 2021/10/01 10:40 AM |
MMU privileges | sr | 2021/09/21 11:07 AM |
MMU privileges | Linus Torvalds | 2021/09/21 01:49 PM |
Virtually tagged L1-caches | Konrad Schwarz | 2021/09/16 04:18 AM |
Virtually tagged L1-caches | Carson | 2021/09/16 01:12 PM |
Virtually tagged L1-caches | anon2 | 2021/09/16 05:16 PM |
Virtually tagged L1-caches | rwessel | 2021/09/16 06:29 PM |
Virtually tagged L1-caches | sr | 2021/09/20 04:20 AM |
Virtually tagged L1-caches | --- | 2021/09/08 02:28 PM |
Virtually tagged L1-caches | anonymou5 | 2021/09/08 08:28 PM |
Virtually tagged L1-caches | anonymou5 | 2021/09/08 08:34 PM |
Virtually tagged L1-caches | --- | 2021/09/09 10:14 AM |
Virtually tagged L1-caches | anonymou5 | 2021/09/09 10:44 PM |
Multi-threading? | David Kanter | 2021/09/09 09:32 PM |
Multi-threading? | --- | 2021/09/10 09:19 AM |
Virtually tagged L1-caches | sr | 2021/09/11 01:19 AM |
Virtually tagged L1-caches | sr | 2021/09/11 01:36 AM |
Virtually tagged L1-caches | --- | 2021/09/11 09:53 AM |
Virtually tagged L1-caches | sr | 2021/09/12 12:43 AM |
Virtually tagged L1-caches | Linus Torvalds | 2021/09/12 11:10 AM |
Virtually tagged L1-caches | sr | 2021/09/12 11:57 AM |
Virtually tagged L1-caches | dmcq | 2021/09/13 08:31 AM |
Virtually tagged L1-caches | sr | 2021/09/20 04:11 AM |
Virtually tagged L1-caches | sr | 2021/09/11 02:49 AM |
Virtually tagged L1-caches | Linus Torvalds | 2021/09/08 12:34 PM |
Virtually tagged L1-caches | dmcq | 2021/09/09 02:46 AM |
Virtually tagged L1-caches | dmcq | 2021/09/09 02:58 AM |
Virtually tagged L1-caches | sr | 2021/09/11 01:29 AM |
Virtually tagged L1-caches | dmcq | 2021/09/11 08:59 AM |
Virtually tagged L1-caches | sr | 2021/09/12 12:57 AM |
Virtually tagged L1-caches | dmcq | 2021/09/12 08:44 AM |
Virtually tagged L1-caches | sr | 2021/09/12 09:48 AM |
Virtually tagged L1-caches | dmcq | 2021/09/12 01:22 PM |
Virtually tagged L1-caches | sr | 2021/09/20 04:40 AM |
Where do you see this information? (NT) | anon2 | 2021/09/09 02:45 AM |
Where do you see this information? | sr | 2021/09/11 01:40 AM |
Where do you see this information? | anon2 | 2021/09/11 01:53 AM |
Where do you see this information? | sr | 2021/09/11 02:08 AM |
Thank you (NT) | anon2 | 2021/09/11 04:31 PM |