By: dmcq (dmcq.delete@this.fano.co.uk), September 28, 2021 7:45 am
Room: Moderated Discussions
Adrian (a.delete@this.acm.org) on September 27, 2021 10:59 pm wrote:
> Adrian (a.delete@this.acm.org) on September 27, 2021 10:40 pm wrote:
> > David Hess (davidwhess.delete@this.gmail.com) on September 27, 2021 11:35 am wrote:
> > > blaine (myname.delete@this.acm.org) on September 26, 2021 11:19 pm wrote:
> > > >
> > > > As someone who was there: Morse was under severe constraints in design of the 8086.
> > > > I would not read anything into segments but as an expedient under constraints.
> > >
> > > I will add as an experienced 8080 and Z80 programmer at the
> > > time, the 8086 segmenting scheme was seen as a great
> > > improvement over contemporary developing solutions. Its
> > > limitations only became a problem later when single
> > > data structures exceeded the size of the entire 64 kilobyte
> > > address range of the previous generation of processors,
> > > and the alternatives (Zilog, others), except for a single larger address range (68000), were worse.
> > >
> >
> >
> > The 1978 Intel 8086 segmenting scheme was a great improvement
> > not only over the existing microprocesors with a
> > 16-bit address space, but also over what was available for the most popular minicomputers, i.e. DEC PDP-11.
> >
> > DEC PDP-11 extended its 16-bit address space to a 22-bit address
> > space (i.e. 4 MB) using a very primitive paging scheme.
> >
> > Paging in PDP-11 and similar minicomputers had nothing to do with paging in VAX, 80386 and similar
> > CPUs, where it was used for dynamic relocation, memory protection and virtual memory.
> >
> >
> > Paging in PDP-11 was primarily only a method for address space extension, which was far more inconvenient
> > to use than the segments of 8086, which could start at any 16-byte aligned address in the memory and which
> > could be loaded together with in-segment pointers with a single instruction (JMP FAR, LDS, LES).
> >
> > In PDP-11 you could access simultaneously the equivalent of two 64 kB segments, a data segment and a
> > code segment, but whenever you needed to access data or code from another part of the memory switching
> > the right pages was a much more tedious and convoluted process than using far pointers with 8086.
> >
> > Also, the fact that 8086 had 4 simultaneously accessible segments instead of only
> > 2 reduced a lot the need of switching segments in comparison with PDP-11.
> >
> >
>
>
> I want to add that because of the difficulties of using the PDP-11 paging, in simpler
> operating systems, i.e. UNIX, paging was not used at all in user programs.
>
> UNIX processes were limited in size to what was accessible without switching pages, i.e. an
> up to 64 kB text segment and an up to 64 kB sum of the data, bss, stack and heap sizes.
>
> The entire up to 4 MB PDP-11 memory was used only by running concurrently many UNIX processes.
>
> On the other hand on Intel 8086 there was no problem e.g. to use a 512 kB array
> in your program, if you compiled it for the large or compact memory models.
When all this business about PDP and paging was started here I thought the DECsystem-10 was meant, not PDP-11! That had proper virtual memory and ran big time sharing systems. Well big for the time! ;-)
> Adrian (a.delete@this.acm.org) on September 27, 2021 10:40 pm wrote:
> > David Hess (davidwhess.delete@this.gmail.com) on September 27, 2021 11:35 am wrote:
> > > blaine (myname.delete@this.acm.org) on September 26, 2021 11:19 pm wrote:
> > > >
> > > > As someone who was there: Morse was under severe constraints in design of the 8086.
> > > > I would not read anything into segments but as an expedient under constraints.
> > >
> > > I will add as an experienced 8080 and Z80 programmer at the
> > > time, the 8086 segmenting scheme was seen as a great
> > > improvement over contemporary developing solutions. Its
> > > limitations only became a problem later when single
> > > data structures exceeded the size of the entire 64 kilobyte
> > > address range of the previous generation of processors,
> > > and the alternatives (Zilog, others), except for a single larger address range (68000), were worse.
> > >
> >
> >
> > The 1978 Intel 8086 segmenting scheme was a great improvement
> > not only over the existing microprocesors with a
> > 16-bit address space, but also over what was available for the most popular minicomputers, i.e. DEC PDP-11.
> >
> > DEC PDP-11 extended its 16-bit address space to a 22-bit address
> > space (i.e. 4 MB) using a very primitive paging scheme.
> >
> > Paging in PDP-11 and similar minicomputers had nothing to do with paging in VAX, 80386 and similar
> > CPUs, where it was used for dynamic relocation, memory protection and virtual memory.
> >
> >
> > Paging in PDP-11 was primarily only a method for address space extension, which was far more inconvenient
> > to use than the segments of 8086, which could start at any 16-byte aligned address in the memory and which
> > could be loaded together with in-segment pointers with a single instruction (JMP FAR, LDS, LES).
> >
> > In PDP-11 you could access simultaneously the equivalent of two 64 kB segments, a data segment and a
> > code segment, but whenever you needed to access data or code from another part of the memory switching
> > the right pages was a much more tedious and convoluted process than using far pointers with 8086.
> >
> > Also, the fact that 8086 had 4 simultaneously accessible segments instead of only
> > 2 reduced a lot the need of switching segments in comparison with PDP-11.
> >
> >
>
>
> I want to add that because of the difficulties of using the PDP-11 paging, in simpler
> operating systems, i.e. UNIX, paging was not used at all in user programs.
>
> UNIX processes were limited in size to what was accessible without switching pages, i.e. an
> up to 64 kB text segment and an up to 64 kB sum of the data, bss, stack and heap sizes.
>
> The entire up to 4 MB PDP-11 memory was used only by running concurrently many UNIX processes.
>
> On the other hand on Intel 8086 there was no problem e.g. to use a 512 kB array
> in your program, if you compiled it for the large or compact memory models.
When all this business about PDP and paging was started here I thought the DECsystem-10 was meant, not PDP-11! That had proper virtual memory and ran big time sharing systems. Well big for the time! ;-)
Topic | Posted By | Date |
---|---|---|
POWER10 SAP SD benchmark | anon2 | 2021/09/06 03:36 PM |
POWER10 SAP SD benchmark | Daniel B | 2021/09/07 02:31 AM |
"Cores" (and SPEC) | Rayla | 2021/09/07 07:51 AM |
"Cores" (and SPEC) | anon | 2021/09/07 03:56 PM |
POWER10 SAP SD benchmark | Anon | 2021/09/07 03:24 PM |
POWER10 SAP SD benchmark | Anon | 2021/09/07 03:27 PM |
Virtually tagged L1-caches | sr | 2021/09/08 05:49 AM |
Virtually tagged L1-caches | dmcq | 2021/09/08 08:22 AM |
Virtually tagged L1-caches | sr | 2021/09/08 08:56 AM |
Virtually tagged L1-caches | Hugo Décharnes | 2021/09/08 08:58 AM |
Virtually tagged L1-caches | sr | 2021/09/08 10:09 AM |
Virtually tagged L1-caches | Hugo Décharnes | 2021/09/08 10:46 AM |
Virtually tagged L1-caches | sr | 2021/09/08 11:35 AM |
Virtually tagged L1-caches | Hugo Décharnes | 2021/09/08 12:23 PM |
Virtually tagged L1-caches | sr | 2021/09/08 12:40 PM |
Virtually tagged L1-caches | anon | 2021/09/09 03:16 AM |
Virtually tagged L1-caches | Konrad Schwarz | 2021/09/10 05:19 AM |
Virtually tagged L1-caches | Hugo Décharnes | 2021/09/10 06:59 AM |
Virtually tagged L1-caches | anon | 2021/09/14 03:17 AM |
Virtually tagged L1-caches | dmcq | 2021/09/14 09:34 AM |
Or use a PLB (NT) | Paul A. Clayton | 2021/09/14 09:45 AM |
Or use a PLB | Linus Torvalds | 2021/09/14 03:27 PM |
Or use a PLB | anon | 2021/09/15 12:15 AM |
Or use a PLB | Michael S | 2021/09/15 03:21 AM |
Or use a PLB | dmcq | 2021/09/15 03:42 PM |
Or use a PLB | Konrad Schwarz | 2021/09/16 04:24 AM |
Or use a PLB | Michael S | 2021/09/16 10:13 AM |
Or use a PLB | --- | 2021/09/16 01:02 PM |
PLB reference | Paul A. Clayton | 2021/09/18 02:35 PM |
PLB reference | Michael S | 2021/09/18 04:14 PM |
Demand paging/translation orthogonal | Paul A. Clayton | 2021/09/19 07:33 AM |
Demand paging/translation orthogonal | Michael S | 2021/09/19 09:10 AM |
PLB reference | Carson | 2021/09/20 10:19 PM |
PLB reference | sr | 2021/09/20 06:02 AM |
PLB reference | Michael S | 2021/09/20 07:03 AM |
PLB reference | Linus Torvalds | 2021/09/20 12:10 PM |
Or use a PLB | sr | 2021/09/20 04:32 AM |
Or use a PLB | sr | 2021/09/21 09:36 AM |
Or use a PLB | Linus Torvalds | 2021/09/21 10:04 AM |
Or use a PLB | sr | 2021/09/21 10:48 AM |
Or use a PLB | Linus Torvalds | 2021/09/21 01:55 PM |
Or use a PLB | sr | 2021/09/22 06:55 AM |
Or use a PLB | rwessel | 2021/09/22 07:09 AM |
Or use a PLB | Linus Torvalds | 2021/09/22 11:50 AM |
Or use a PLB | sr | 2021/09/22 01:00 PM |
Or use a PLB | dmcq | 2021/09/22 04:07 PM |
Or use a PLB | Etienne Lorrain | 2021/09/23 08:50 AM |
Or use a PLB | anon2 | 2021/09/22 04:09 PM |
Or use a PLB | dmcq | 2021/09/23 02:35 AM |
Or use a PLB | ⚛ | 2021/09/23 09:37 AM |
Or use a PLB | Linus Torvalds | 2021/09/23 12:01 PM |
Or use a PLB | gpd | 2021/09/24 03:59 AM |
Or use a PLB | Linus Torvalds | 2021/09/24 10:45 AM |
Or use a PLB | dmcq | 2021/09/24 12:43 PM |
Or use a PLB | sr | 2021/09/25 10:19 AM |
Or use a PLB | Linus Torvalds | 2021/09/25 10:44 AM |
Or use a PLB | sr | 2021/09/25 11:11 AM |
Or use a PLB | Linus Torvalds | 2021/09/25 11:31 AM |
Or use a PLB | sr | 2021/09/25 11:52 AM |
Or use a PLB | Linus Torvalds | 2021/09/25 12:05 PM |
Or use a PLB | sr | 2021/09/25 12:23 PM |
Or use a PLB | rwessel | 2021/09/25 03:29 PM |
Or use a PLB | sr | 2021/10/01 12:22 AM |
Or use a PLB | rwessel | 2021/10/01 06:19 AM |
Or use a PLB | David Hess | 2021/10/01 10:35 AM |
Or use a PLB | rwessel | 2021/10/02 04:47 AM |
Or use a PLB | sr | 2021/10/02 11:16 AM |
Or use a PLB | rwessel | 2021/10/02 11:53 AM |
Or use a PLB | Linus Torvalds | 2021/09/25 11:57 AM |
Or use a PLB | sr | 2021/09/25 12:07 PM |
Or use a PLB | Linus Torvalds | 2021/09/25 12:21 PM |
Or use a PLB | sr | 2021/09/25 12:40 PM |
Or use a PLB | nksingh | 2021/09/27 09:07 AM |
Or use a PLB | ⚛ | 2021/09/27 09:02 AM |
Or use a PLB | Linus Torvalds | 2021/09/27 10:20 AM |
Or use a PLB | Linus Torvalds | 2021/09/27 12:58 PM |
Or use a PLB | dmcq | 2021/09/28 10:59 AM |
Or use a PLB | sr | 2021/09/25 10:34 AM |
Or use a PLB | rwessel | 2021/09/25 03:44 PM |
Or use a PLB | sr | 2021/10/01 01:04 AM |
Or use a PLB | rwessel | 2021/10/01 06:33 AM |
I386 segmentation highlights | sr | 2021/10/04 07:53 AM |
I386 segmentation highlights | Adrian | 2021/10/04 09:53 AM |
I386 segmentation highlights | sr | 2021/10/04 10:19 AM |
I386 segmentation highlights | rwessel | 2021/10/04 04:57 PM |
I386 segmentation highlights | sr | 2021/10/05 11:16 AM |
I386 segmentation highlights | Michael S | 2021/10/05 12:27 PM |
I386 segmentation highlights | rwessel | 2021/10/05 04:20 PM |
Or use a PLB | JohnG | 2021/09/25 10:18 PM |
Or use a PLB | ⚛ | 2021/09/27 07:37 AM |
Or use a PLB | Heikki Kultala | 2021/09/28 03:53 AM |
Or use a PLB | rwessel | 2021/09/28 07:29 AM |
Or use a PLB | David Hess | 2021/09/23 06:00 PM |
Or use a PLB | Adrian | 2021/09/24 01:21 AM |
Or use a PLB | dmcq | 2021/09/25 12:41 PM |
Or use a PLB | blaine | 2021/09/26 11:19 PM |
Or use a PLB | David Hess | 2021/09/27 11:35 AM |
Or use a PLB | blaine | 2021/09/27 05:19 PM |
Or use a PLB | Adrian | 2021/09/27 10:40 PM |
Or use a PLB | Adrian | 2021/09/27 10:59 PM |
Or use a PLB | dmcq | 2021/09/28 07:45 AM |
Or use a PLB | rwessel | 2021/09/28 07:45 AM |
Or use a PLB | David Hess | 2021/09/28 12:50 PM |
Or use a PLB | Etienne Lorrain | 2021/09/30 01:25 AM |
Or use a PLB | David Hess | 2021/10/01 10:40 AM |
MMU privileges | sr | 2021/09/21 11:07 AM |
MMU privileges | Linus Torvalds | 2021/09/21 01:49 PM |
Virtually tagged L1-caches | Konrad Schwarz | 2021/09/16 04:18 AM |
Virtually tagged L1-caches | Carson | 2021/09/16 01:12 PM |
Virtually tagged L1-caches | anon2 | 2021/09/16 05:16 PM |
Virtually tagged L1-caches | rwessel | 2021/09/16 06:29 PM |
Virtually tagged L1-caches | sr | 2021/09/20 04:20 AM |
Virtually tagged L1-caches | --- | 2021/09/08 02:28 PM |
Virtually tagged L1-caches | anonymou5 | 2021/09/08 08:28 PM |
Virtually tagged L1-caches | anonymou5 | 2021/09/08 08:34 PM |
Virtually tagged L1-caches | --- | 2021/09/09 10:14 AM |
Virtually tagged L1-caches | anonymou5 | 2021/09/09 10:44 PM |
Multi-threading? | David Kanter | 2021/09/09 09:32 PM |
Multi-threading? | --- | 2021/09/10 09:19 AM |
Virtually tagged L1-caches | sr | 2021/09/11 01:19 AM |
Virtually tagged L1-caches | sr | 2021/09/11 01:36 AM |
Virtually tagged L1-caches | --- | 2021/09/11 09:53 AM |
Virtually tagged L1-caches | sr | 2021/09/12 12:43 AM |
Virtually tagged L1-caches | Linus Torvalds | 2021/09/12 11:10 AM |
Virtually tagged L1-caches | sr | 2021/09/12 11:57 AM |
Virtually tagged L1-caches | dmcq | 2021/09/13 08:31 AM |
Virtually tagged L1-caches | sr | 2021/09/20 04:11 AM |
Virtually tagged L1-caches | sr | 2021/09/11 02:49 AM |
Virtually tagged L1-caches | Linus Torvalds | 2021/09/08 12:34 PM |
Virtually tagged L1-caches | dmcq | 2021/09/09 02:46 AM |
Virtually tagged L1-caches | dmcq | 2021/09/09 02:58 AM |
Virtually tagged L1-caches | sr | 2021/09/11 01:29 AM |
Virtually tagged L1-caches | dmcq | 2021/09/11 08:59 AM |
Virtually tagged L1-caches | sr | 2021/09/12 12:57 AM |
Virtually tagged L1-caches | dmcq | 2021/09/12 08:44 AM |
Virtually tagged L1-caches | sr | 2021/09/12 09:48 AM |
Virtually tagged L1-caches | dmcq | 2021/09/12 01:22 PM |
Virtually tagged L1-caches | sr | 2021/09/20 04:40 AM |
Where do you see this information? (NT) | anon2 | 2021/09/09 02:45 AM |
Where do you see this information? | sr | 2021/09/11 01:40 AM |
Where do you see this information? | anon2 | 2021/09/11 01:53 AM |
Where do you see this information? | sr | 2021/09/11 02:08 AM |
Thank you (NT) | anon2 | 2021/09/11 04:31 PM |