--- (---.delete@this.redheron.com) on September 13, 2021 11:19 am wrote:
>
> - one thing Apple do (I don't know about other designs) is slide voltage up and down while keeping frequency unchanged.

That is how it has always worked going back decades before DVFS was found in high performance processors. Each operating frequency requires a minimum voltage and when increasing frequency, the voltage must be increased and settle into place before the frequency is adjusted. When decreasing frequency, the frequency is lowered before lowering the voltage.

> Obviously changing frequency is somewhat disruptive in a way that changing voltage is not.

It depends on exactly how it is done. If a phase or delay locked loop is controlling the frequency, then setup and hold time violations between clock domains are likely while the frequency is changing so there is a brief time where this has to be handled somehow.

Alternatively sometimes a digital divider can be used to generate multiple phase coherent frequencies and changing between them can be instantaneous. As I remember from looking into it a couple years ago, more recent processors support both depending on what is being changed.