microbenchmark results

By: --- (---.delete@this.redheron.com), September 25, 2021 8:56 am
Room: Moderated Discussions
Doug S (foo.delete@this.bar.bar) on September 24, 2021 11:46 pm wrote:
> --- (---.delete@this.redheron.com) on September 24, 2021 7:06 pm wrote:
> > Doug S (foo.delete@this.bar.bar) on September 24, 2021 2:12 pm wrote:
> > > dmcq (dmcq.delete@this.fano.co.uk) on September 24, 2021 1:05 pm wrote:
> > > > SVE is in multiples of 128 bits so not so bad! I' guess
> > > > the first hetrogenous system with a size greater than
> > > > 128 bits will be an Apple one and I guess they'l go for having the same size in both, perhaps they'll share
> > > > an SVE unit amongst the small cores like ARM. But they haven't even announced a system with SVE yet.
> > >
> > >
> > > Considering Apple was able to ship millions of ARMv8 CPUs less than a year after ARM released the
> > > spec (a FAR more difficult accomplishment than adding SVE) if Apple was going to ship CPUs with SVE
> > > they probably would have. SVE was announced as an optional extension to ARMv8.2 over five years ago,
> > > and SVE2 over two years ago - they also submitted patches for SVE2 to LLVM in late 2019.
> > >
> > > Now it is possible that the ARM Mac effort with M1 and soon Jade-C took up too much engineering
> > > bandwidth and they put SVE2 on the back burner, but if they were planning on introducing
> > > it at all doing so with the very first ARM Macs (i.e. making that something developers
> > > could assume exist in every ARM Mac) would be the most logical course.
> >
> > Not necessarily.
> > Until now Apple has debuted new cores with iPhones; so inertia made people believe
> > this would always be the case. But nothing says it has to be this way!
> >
> > Going forward a more logical pattern would be
> > - new cores introduced via a Mac high-end product, which is a more logical place to ooh and ahh over all
> > the new whatsits and thingamajigs that have been added to make this core X% faster than its predecessor.
> >
> > - two year cadence on cores. This allows for deeper changes, and doesn't have
> > to mean two year cadence on SoC's, as we saw this year with, essentially,
> > last year's core but improved GPU, NPU, SLC and who knows what else.
> >
> > - this scheme also allows more flexibility in timing. Everyone expects iPhones in September; it
> > will be tough to break that. But high end Macs arrive when they arrive. The schedule can plan for
> > the core to be ready in January, but if it slips two months that won't be a catastrophe.
> >
> > - Apple already have a scheme of multiple cores and SoCs
> > of different ages across different products. Expanding
> > this from the current scheme of two SoC "levels" (good, A#; and better M#) to three including a best level
> > (new random letter#), and having a given year's products
> > spread over these three SoCs and two or three cores
> > is no serious change (look at either iPhones, or at iPads, right now using M1, A15, and A13)
> >
> > In other words, I'm not yet convinced that the A15 represents
> > any sort of intrinsic slow-down in core design,
> > more that it's just the first SoC of Apple's Phase 3, and
> > like any such transition it's hard to see the pattern
> > with only one example. I'd say let's wait for the high end
> > machines before getting excited. (And high-end means
> > high-end. I expect the same pattern of a minor upgrade
> > to the M1 -- pick up the new GPUs, perhaps get either
> > more RAM or LPDDR5 -- but essentially the A15 core. I'm referring to the iMac Pro/Mac Pro class machines.)
>
>
> Personally I think A15 has a completely unchanged big core from A14. The little cores may be different,
> or may have gained relatively more clock rate than the big cores, since the MT scores improved a lot
> more than the ST scores. It is almost impossible the A15 has a new big core - all evidence is that the
> IPC "gain" is exactly 0%. A new design would improve IPC or at least CHANGE it in various workloads,
> but the odds changes of IPC across all workloads would cancel out to exactly 0% are pretty long.

Those who look at this stuff via OS exploration claim at least
- AMXv3 (but no knowledge of what has changed there)
- more physical address bits
- nested virtualization

https://twitter.com/never_released/status/1440286198178615305

But that is not incompatible with a claim of "nothing but minimal" changes or bug fixes, ie no changes relevant to performance.

The MT performance changes (and the better battery life?) appear to be a consequence of overall energy usage, which may be physical optimization. Point is, although MT performance looks higher, that's somewhat misleading -- if you aggressively cool an A14 while running GB MT, you will get a number that's the same sort of 10% or so lower than the A15 number, rather than the 20+% lower you get with without that aggressive cooling. That MT performance was always in the A14, just hidden by thermals.

> Why reuse the A14 core? I think it is probably like you're saying - assuming the Jade-C rumors are true they
> will be releasing some higher end Macs later this year or early next year. i.e. the ones using a single Jade-C
> - the ones using multiple Jade-Cs as chiplets will be announced at WWDC next June if I had to guess.

I think it's not exactly that the A14 core was reused, more that the lead engineers put all their effort into the next (big Mac) core, while the more junior engineers and those learning the ropes put their effort into low risk items that had been sitting on the to-do list, from energy optimization and minor bug fixes to boring but deemed necessary work (for what purpose?...) like nested virtualization.

> I think Jade-C gets the new core, which may also appear in the A16 in next year's iPhone, depending on whether
> that uses N4 or N3. There are rumors about Apple using N4 for Macs, if Apple targeted N4 for the new core
> that would explain why A15 got a recycled core since it is using N5P. N4 reportedly enters volume production
> next month, so depending on how many working Jade-C dies they could get from risk production they might be
> able to ship some new Macs for Christmas but by January for sure. With N3 not entering volume production until
> July it may not be feasible for A16, unless they are willing to delay their normal September launch or accept
> the potential for greater initial shortages of iPhones than they've had the last few years.

> However I still think if Apple was going to add SVE2 it would be stupid to have missed adding
> it to the M1 when we know they easily could have based on their record with ARMv8. It makes
> too much sense to make SVE2 a guaranteed feature of every ARM Mac so developers could assume
> its existence. So I don't expect to see it in Jade-C, or the A16 for that matter. Had they
> put a 128 bit SVE2 in M1 they might put a wider one in Jade-C for the higher end stuff.

They have made similar decisions before.
It certainly wasn't ideal that the first gen (and *only* the first gen) of Intel Macs used the 32-bit only Core Duo, with a rapid transition to 64-bit Core 2 Duo. And yet who remembers, or cares about, this?

Apple know that the people who buy the first gen of these changes are either
- very much non-technical users who simply do not care. They buy a Mac because it's a Mac, they may (or may not, depending on how much their more tech friend nag them) upgrade their OS occasionally; at some point after 5..7 years Apple stops updating that machine but they don't notice, and the machine keeps chugging along until it physically dies. I know plenty of these people.
- they are very technical users/enthusiasts/developers. And they will be replacing this Mac within two or three years.

So either way, nothing really matters much that the first generation is not everything one might want. Sure, it means some heterogeneity in the landscape; but that's always there.
Hell, this whole transition will be a lot less messy than the years surrounding the PPC to Intel transition where Apple was juggling transition to 64-bit, multi-core, and Intel; and there were multiple machines released with different subsets of these features!
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TopicPosted ByDate
Armv8.8-A and Armv9.3-Aanonymou52021/09/16 02:25 PM
  Armv8.8-A and Armv9.3-ADoug S2021/09/16 09:57 PM
    Armv8.8-A and Armv9.3-ABrett2021/09/16 10:32 PM
      Armv8.8-A and Armv9.3-Aanon2021/09/16 10:55 PM
        Armv8.8-A and Armv9.3-Anone2021/09/16 11:51 PM
      Armv8.8-A and Armv9.3-AJörn Engel2021/09/17 04:42 AM
        Armv8.8-A and Armv9.3-AMichael S2021/09/17 06:48 AM
          Armv8.8-A and Armv9.3-AJörn Engel2021/09/18 01:01 PM
            Armv8.8-A and Armv9.3-AMichael S2021/09/18 02:58 PM
              microbenchmark resultsMichael S2021/09/19 03:46 PM
                microbenchmark source codeMichael S2021/09/19 03:58 PM
                  microbenchmark source code-.-2021/09/20 03:49 PM
                    microbenchmark source codeMichael S2021/09/21 09:17 AM
                      microbenchmark source code-.-2021/09/21 03:33 PM
                        microbenchmark source codeMichael S2021/09/21 05:05 PM
                microbenchmark resultsAnon2021/09/19 04:32 PM
                  microbenchmark resultsJörn Engel2021/09/19 07:46 PM
                    microbenchmark resultsdmcq2021/09/20 01:19 AM
                      microbenchmark resultsMichael S2021/09/20 04:12 AM
                      microbenchmark results-.-2021/09/20 03:44 PM
                        microbenchmark resultsMichael S2021/09/21 09:23 AM
                          microbenchmark results-.-2021/09/21 03:35 PM
                            microbenchmark resultsAndrey2021/09/21 04:25 PM
                              I agree (NT)Michael S2021/09/21 05:07 PM
                              microbenchmark results-.-2021/09/22 04:56 PM
                                microbenchmark resultsMichael S2021/09/23 05:11 AM
                                  microbenchmark resultsdmcq2021/09/23 06:53 AM
                                  microbenchmark resultsAndrey2021/09/23 09:20 AM
                                microbenchmark resultsAndrey2021/09/23 09:11 AM
                                  microbenchmark results-.-2021/09/23 07:01 PM
                                    microbenchmark resultsSimon Farnsworth2021/09/24 01:47 AM
                                      microbenchmark results-.-2021/09/24 05:00 PM
                                    microbenchmark resultsAndrey2021/09/24 07:29 AM
                                      microbenchmark resultsdmcq2021/09/24 12:05 PM
                                        microbenchmark resultsDoug S2021/09/24 01:12 PM
                                          microbenchmark results---2021/09/24 06:06 PM
                                            microbenchmark resultsDoug S2021/09/24 10:46 PM
                                              microbenchmark results---2021/09/25 08:56 AM
                                                microbenchmark resultsJukka Larja2021/09/26 01:01 AM
                                                microbenchmark resultsDoug S2021/09/26 08:41 AM
                                                  microbenchmark resultsdmcq2021/09/26 12:37 PM
                                                    microbenchmark resultsDoug S2021/09/27 09:32 AM
                                                      microbenchmark resultsdmcq2021/09/28 06:56 AM
                                              microbenchmark resultsDummond D. Slow2021/09/25 11:49 AM
                                                microbenchmark resultsBrett2021/09/25 02:31 PM
                                              microbenchmark resultsdmcq2021/09/25 11:51 AM
                                                microbenchmark resultsDoug S2021/09/26 08:45 AM
                                            microbenchmark resultsRichard S2021/09/25 12:51 AM
                                              microbenchmark resultsDummond D. Slow2021/09/25 11:52 AM
                                                microbenchmark results---2021/09/25 02:04 PM
                                      SVE alignment with non power-of-2 widths-.-2021/09/24 05:10 PM
                                        SVE alignment with non power-of-2 widthsAndrey2021/09/25 03:46 AM
                                          SVE alignment with non power-of-2 widths-.-2021/09/25 04:35 PM
                                          SVE alignment with non power-of-2 widthsKevin G2021/09/27 08:46 AM
                                            SVE alignment with non power-of-2 widths-.-2021/09/27 08:06 PM
                                              SVE alignment with non power-of-2 widthsJukka Larja2021/09/28 05:37 AM
                                                SVE alignment with non power-of-2 widthsAndrey2021/09/28 11:12 AM
                                                  SVE alignment with non power-of-2 widthsdmcq2021/09/28 01:29 PM
                                                SVE alignment with non power-of-2 widths-.-2021/09/28 05:37 PM
                                                  SVE alignment with non power-of-2 widthsJukka Larja2021/09/29 05:50 AM
                    microbenchmark results---2021/09/20 06:11 AM
                    microbenchmark resultsJörn Engel2021/09/23 04:10 AM
                      microbenchmark resultsMichael S2021/09/23 04:55 AM
                        microbenchmark resultsJörn Engel2021/09/23 08:24 AM
                          microbenchmark resultsRoyi2021/09/26 03:25 PM
                      microbenchmark resultsdmcq2021/09/23 09:42 AM
                        microbenchmark results---2021/09/23 10:53 AM
                      microbenchmark resultsanon22021/09/23 01:40 PM
                microbenchmark results: Zen 3Adrian2021/09/22 12:57 AM
                  microbenchmark results: Zen 3Adrian2021/09/22 01:08 AM
                    microbenchmark results: Zen 3Michael S2021/09/22 04:48 AM
                      microbenchmark results: Zen 3Adrian2021/09/22 05:05 AM
        Armv8.8-A and Armv9.3-AKonrad Schwarz2021/09/28 04:45 AM
    Armv8.8-A and Armv9.3-ALinus Torvalds2021/09/17 07:59 AM
      Armv8.8-A and Armv9.3-ADoug S2021/09/17 10:35 AM
        Armv8.8-A and Armv9.3-Anksingh2021/09/17 11:23 AM
          Armv8.8-A and Armv9.3-ADoug S2021/09/17 01:35 PM
            Armv8.8-A and Armv9.3-AKonrad Schwarz2021/10/15 05:23 AM
              Armv8.8-A and Armv9.3-Arwessel2021/10/15 05:49 AM
        Armv8.8-A and Armv9.3-AAdrian2021/09/17 10:07 PM
          Armv8.8-A and Armv9.3-ADoug S2021/09/18 06:34 AM
            Armv8.8-A and Armv9.3-AAdrian2021/09/18 06:38 AM
      Armv8.8-A and Armv9.3-Ablaine2021/09/18 09:37 AM
      Armv8.8-A and Armv9.3-ABrett2021/09/19 12:06 PM
        Armv8.8-A and Armv9.3-Admcq2021/09/19 12:36 PM
        Armv8.8-A and Armv9.3-ADoug S2021/09/19 05:07 PM
          Armv8.8-A and Armv9.3-A - movesdmcq2021/09/28 08:54 AM
            Armv8.8-A and Armv9.3-A - movesDoug S2021/09/28 12:57 PM
              Armv8.8-A and Armv9.3-A - movesdmcq2021/09/28 01:21 PM
                Armv8.8-A and Armv9.3-A - movesNoSpammer2021/09/29 02:53 AM
                  Armv8.8-A and Armv9.3-A - movesrwessel2021/09/29 05:55 AM
                    Armv8.8-A and Armv9.3-A - movesdmcq2021/09/29 06:53 AM
                      Armv8.8-A and Armv9.3-A - movesrwessel2021/09/29 10:35 AM
                        Armv8.8-A and Armv9.3-A - movesdmcq2021/09/29 12:44 PM
                          Armv8.8-A and Armv9.3-A - movesrwessel2021/09/29 12:58 PM
                            Armv8.8-A and Armv9.3-A - movesdmcq2021/09/29 02:52 PM
                              Armv8.8-A and Armv9.3-A - movesrwessel2021/09/29 05:36 PM
                              Armv8.8-A and Armv9.3-A - movesAndrey2021/09/29 06:58 PM
                    Armv8.8-A and Armv9.3-A - movesDoug S2021/09/29 09:10 AM
                      Armv8.8-A and Armv9.3-A - movesrwessel2021/09/29 10:30 AM
                        Armv8.8-A and Armv9.3-A - movesDoug S2021/09/29 09:02 PM
                          Armv8.8-A and Armv9.3-A - movesrwessel2021/09/29 10:22 PM
                            Armv8.8-A and Armv9.3-A - movesMark Roulo2021/09/30 06:37 AM
                              Armv8.8-A and Armv9.3-A - movesrwessel2021/09/30 07:02 AM
                                Did they publish a full description? (NT)Michael S2021/09/30 07:12 AM
                                  Did they publish a full description?rwessel2021/09/30 08:18 AM
                                    Did they publish a full description?Michael S2021/09/30 09:24 AM
                                      Did they publish a full description?rwessel2021/09/30 09:42 AM
                                    Did they publish a full description?Adrian2021/09/30 11:22 PM
                                  Do we even okiw it's three instructions per move?Carson2021/09/30 09:28 PM
                                    Do we even okiw it's three instructions per move?Adrian2021/09/30 11:27 PM
                                    Do we even okiw it's three instructions per move?rwessel2021/10/01 03:19 AM
                            Armv8.8-A and Armv9.3-A - movesDoug S2021/09/30 08:48 AM
                              Armv8.8-A and Armv9.3-A - movesrwessel2021/09/30 09:39 AM
                                Armv8.8-A and Armv9.3-A - movesDoug S2021/09/30 01:56 PM
                                  Armv8.8-A and Armv9.3-A - movesrwessel2021/09/30 04:20 PM
                                    Armv8.8-A and Armv9.3-A - movesdmcq2021/10/01 03:38 AM
                                      Armv8.8-A and Armv9.3-A - movesMichael S2021/10/01 04:04 AM
                                        Armv8.8-A and Armv9.3-A - movesLinus Torvalds2021/10/01 10:01 AM
                                          memcpy - instruction cracking vs DMArpg2021/10/02 01:51 AM
                                            memcpy - instruction cracking vs DMAAdrian2021/10/02 02:45 AM
                                              memcpy - instruction cracking vs DMADoug S2021/10/02 08:47 AM
                                                memcpy - instruction cracking vs DMAAdrian2021/10/02 09:15 AM
                                                memcpy - instruction cracking vs DMArwessel2021/10/02 10:37 AM
                                                  memcpy - instruction cracking vs DMADoug S2021/10/02 05:49 PM
                                            memcpy - instruction cracking vs DMALinus Torvalds2021/10/02 09:43 AM
                                              memcpy - instruction cracking vs DMAdmcq2021/10/02 10:32 AM
                                              memcpy - instruction cracking vs DMABrett2021/10/02 10:45 AM
                                              memcpy - instruction cracking vs DMA---2021/10/02 02:03 PM
                                                memcpy - instruction cracking vs DMA---2021/10/02 02:12 PM
                                                  Moving copy to DRAM doesn't help for small copiesMark Roulo2021/10/02 02:59 PM
                                                    Moving copy to DRAM doesn't help for small copies---2021/10/02 06:32 PM
                                                      Moving copy to DRAM doesn't help for small copiesMichael S2021/10/03 12:40 AM
                                                        Moving copy to DRAM doesn't help for small copiesDoug S2021/10/03 09:09 AM
                                                          Moving copy to DRAM doesn't help for small copiesrwessel2021/10/03 09:51 AM
                                                          Moving copy to DRAM doesn't help for small copiesLinus Torvalds2021/10/03 10:09 AM
                                                            How about environments such as Java?Mark Roulo2021/10/03 11:41 AM
                                                              How about environments such as Java?rwessel2021/10/03 11:49 AM
                                                                How about environments such as Java?Mark Roulo2021/10/03 12:22 PM
                                                              How about environments such as Java?anon22021/10/03 06:58 PM
                                                                How about environments such as Java?Etienne Lorrain2021/10/04 04:08 AM
                                                                  Apart from "It depends" there is no short answer. (NT)Michael S2021/10/04 04:30 AM
                                                                  How about environments such as Java?Andrey2021/10/04 05:04 AM
                                                                  How about environments such as Java?anon22021/10/04 05:32 AM
                                                                How about environments such as Java?Mark Roulo2021/10/04 06:31 AM
                                                                How about environments such as Java?---2021/10/04 08:41 AM
                                                                  How about environments such as Java?Doug S2021/10/04 09:23 AM
                                                                    How about environments such as Java?Andrey2021/10/04 11:14 AM
                                                                      How about environments such as Java?Doug S2021/10/04 12:20 PM
                                                                  How about environments such as Java?anon22021/10/04 01:23 PM
                                                                  How about environments such as Java?rwessel2021/10/04 03:54 PM
                                                            Moving copy to DRAM doesn't help for small copiesJörn Engel2021/10/04 04:52 AM
                                                            Early software zeroing !=== early hardware zeroingPaul A. Clayton2021/10/05 10:19 AM
                                                              Early software zeroing !=== early hardware zeroingDoug S2021/10/05 11:21 AM
                                                memcpy - instruction cracking vs DMABrendan2021/10/02 03:53 PM
                                                  memcpy - instruction cracking vs DMALinus Torvalds2021/10/03 09:48 AM
                                                    memcpy - instruction cracking vs DMAdmcq2021/10/03 12:54 PM
                                              memcpy - instruction cracking vs DMAYuhong Bao2021/10/03 12:30 AM
                                                memcpy - instruction cracking vs DMADavid Hess2021/10/05 04:19 PM
                                                  memcpy - instruction cracking vs DMAAdrian2021/10/05 10:28 PM
                                                    memcpy - instruction cracking vs DMAEtienne Lorrain2021/10/06 01:24 AM
                                                    memcpy - instruction cracking vs DMArwessel2021/10/06 02:38 AM
                                                      memcpy - instruction cracking vs DMAAdrian2021/10/06 03:04 AM
                                                        memcpy - instruction cracking vs DMArwessel2021/10/06 04:59 AM
                                                    memcpy - instruction cracking vs DMA---2021/10/06 08:07 AM
                                                      memcpy - instruction cracking vs DMAAndrey2021/10/06 01:59 PM
                                                    memcpy - instruction cracking vs DMAgallier22021/10/06 10:06 PM
                                                      memcpy - instruction cracking vs DMAAdrian2021/10/06 10:59 PM
                                              memcpy - instruction cracking vs DMAMichael S2021/10/03 12:51 AM
                                                memcpy - instruction cracking vs DMArwessel2021/10/03 04:06 AM
                                                  memcpy - instruction cracking vs DMAMichael S2021/10/03 04:24 AM
                                                    memcpy - instruction cracking vs DMAMatt Sayler2021/10/03 07:02 AM
                                                    memcpy - instruction cracking vs DMADoug S2021/10/03 09:14 AM
                                      Armv8.8-A and Armv9.3-A - movesrwessel2021/10/01 04:10 AM
                                        Armv8.8-A and Armv9.3-A - movesEtienne Lorrain2021/10/01 06:55 AM
                                          Armv8.8-A and Armv9.3-A - movesrwessel2021/10/01 07:14 AM
                                            Armv8.8-A and Armv9.3-A - movesDoug S2021/10/01 10:17 AM
                                              Armv8.8-A and Armv9.3-A - movesrwessel2021/10/02 03:57 AM
  Armv8.8-A and Armv9.3-Anone2021/10/13 05:06 AM
    Armv8.8-A and Armv9.3-AAdrian2021/10/13 05:22 AM
      Armv8.8-A and Armv9.3-ADoug S2021/10/13 08:01 AM
        Armv8.8-A and Armv9.3-Admcq2021/10/13 09:17 AM
          Armv8.8-A and Armv9.3-Anone2021/10/13 09:26 PM
            Armv8.8-A and Armv9.3-Admcq2021/10/14 07:22 AM
    Armv8.8-A and Armv9.3-Arwessel2021/10/14 08:01 AM
      Armv8.8-A and Armv9.3-AAnon2021/10/14 10:08 AM
        Armv8.8-A and Armv9.3-AMichael S2021/10/14 12:25 PM
      Armv8.8-A and Armv9.3-ADoug S2021/10/14 10:18 AM
        Armv8.8-A and Armv9.3-Arwessel2021/10/14 06:07 PM
          Armv8.8-A and Armv9.3-ADoug S2021/10/14 09:23 PM
            Armv8.8-A and Armv9.3-Admcq2021/10/15 12:41 AM
              Armv8.8-A and Armv9.3-AGabriele Svelto2021/10/15 04:07 AM
            Armv8.8-A and Armv9.3-Arwessel2021/10/15 03:49 AM
              Armv8.8-A and Armv9.3-ADoug S2021/10/15 09:44 AM
                Armv8.8-A and Armv9.3-Ame2021/10/15 05:34 PM
                  Armv8.8-A and Armv9.3-ADoug S2021/10/16 08:47 AM
                    Armv8.8-A and Armv9.3-Ame2021/10/17 04:19 AM
                      Armv8.8-A and Armv9.3-ADoug S2021/10/17 09:17 AM
                        Armv8.8-A and Armv9.3-Ame2021/10/17 11:31 AM
                          Armv8.8-A and Armv9.3-ADoug S2021/10/17 12:33 PM
                            Armv8.8-A and Armv9.3-AzArchJon2021/10/18 09:35 AM
                              Armv8.8-A and Armv9.3-ADoug S2021/10/18 01:35 PM
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