By: Doug S (foo.delete@this.bar.bar), September 27, 2021 10:32 am
Room: Moderated Discussions
dmcq (dmcq.delete@this.fano.co.uk) on September 26, 2021 1:37 pm wrote:
> Arm is including SVE2 in all its own new A series and server cores. Anadtech says it is
> baseline standard in ARMv9. I believe it is only optional for non user visible cores.
I know Anandtech said that, and I respect Andrei greatly, but he was wrong. ARMv9 does not "baseline" SVE2. ARM's documentation is QUITE clear that it is optional in ARMv9. See page 26 of the ARMv9 reference manual below (sorry for the formatting of my cut n paste) There is nothing about it only being optional in "non user visible cores".
While it doesn't call out that FEAT_SVE is optional, there is no mention of it being mandatory so its optionality appears to carry over from ARMv8 - the same ARMv9 reference manual quoted below also mentions "if SVE is implemented" in multiple locations so FEAT_SVE must remain optional in ARMv9.
Also, not only are SVE and SVE2 optional, there are optional features WITHIN them. From the SVE supplement reference manual:
They appear to be creating the same mess Intel has with AVX2/AVX512 making them optional and then having some of the functionality within them optional as well.
Now in practice maybe this doesn't matter if ARM plans to include SVE/SVE2 and all optional features in the cores they design - or at least won't confuse matters like Intel by having some cores implement certain features and then release a subsequent core in the same class that lacks them.
The problem is that while Apple can make their own choices with regard to SVE/SVE2 without affecting the overall ARM ecosystem, there's soon going to be a second designer of custom cores that will compete directly with ARM designed cores in the Android and ARM PC market. Qualcomm, with their Nuvia team. So it will be interesting to see how that plays out and whether ARM and Qualcomm make the same decisions as far as whether to include SVE/SVE2 and if so which optional subfeatures are found within.
> Arm is including SVE2 in all its own new A series and server cores. Anadtech says it is
> baseline standard in ARMv9. I believe it is only optional for non user visible cores.
I know Anandtech said that, and I respect Andrei greatly, but he was wrong. ARMv9 does not "baseline" SVE2. ARM's documentation is QUITE clear that it is optional in ARMv9. See page 26 of the ARMv9 reference manual below (sorry for the formatting of my cut n paste) There is nothing about it only being optional in "non user visible cores".
While it doesn't call out that FEAT_SVE is optional, there is no mention of it being mandatory so its optionality appears to carry over from ARMv8 - the same ARMv9 reference manual quoted below also mentions "if SVE is implemented" in multiple locations so FEAT_SVE must remain optional in ARMv9.
B1.1.3 FEAT_SVE2, Scalable Vector Extension version 2
FEAT_SVE2 adds instructions that increase the range of data-processing and load/store addressing modes.
FEAT_SVE2 is OPTIONAL.
This feature is supported in AArch64 state only.
FEAT_SVE2 requires FEAT_SVE.
The following fields indicate the presence of FEAT_SVE2:
• ID_AA64PFR0_EL1.SVE
• ID_AA64ZFR0_EL1.AES
• ID_AA64ZFR0_EL1.BitPerm
• ID_AA64ZFR0_EL1.SHA3
• ID_AA64ZFR0_EL1.SM4
• ID_AA64ZFR0_EL1.SVEver
Also, not only are SVE and SVE2 optional, there are optional features WITHIN them. From the SVE supplement reference manual:
• FEAT_F32MM matrix multiplication instructions are OPTIONAL for SVE in Armv8.2.
• FEAT_F64MM matrix multiplication instructions are OPTIONAL for SVE in Armv8.2.
INZHVT The following list summarizes the OPTIONAL SVE2 features:
• FEAT_SVE_AES Scalable Vector AES instructions.
• FEAT_SVE_BitPerm Scalable Vector Bit Permute instructions.
• FEAT_SVE_PMULL128 Scalable Vector PMULL (128-bit result) instructions.
• FEAT_SVE_SHA3 Scalable Vector RAX1 instruction.
• FEAT_SVE_SM4 Scalable Vector SM4 instructions.
They appear to be creating the same mess Intel has with AVX2/AVX512 making them optional and then having some of the functionality within them optional as well.
Now in practice maybe this doesn't matter if ARM plans to include SVE/SVE2 and all optional features in the cores they design - or at least won't confuse matters like Intel by having some cores implement certain features and then release a subsequent core in the same class that lacks them.
The problem is that while Apple can make their own choices with regard to SVE/SVE2 without affecting the overall ARM ecosystem, there's soon going to be a second designer of custom cores that will compete directly with ARM designed cores in the Android and ARM PC market. Qualcomm, with their Nuvia team. So it will be interesting to see how that plays out and whether ARM and Qualcomm make the same decisions as far as whether to include SVE/SVE2 and if so which optional subfeatures are found within.
