By: Etienne Lorrain (etienne_lorrain.delete@this.yahoo.fr), October 4, 2021 5:08 am
Room: Moderated Discussions
anon2 (anon.delete@this.anon.com) on October 3, 2021 7:58 pm wrote:
> Why? Zeroing at the point of use means you can skip the DRAM step entirely.
> You save one store to DRAM, and possibly even one load from DRAM.
Do processors (and memory cache systems) already have the optimisation "I detected I am writing the complete cache line, no need to read it (maybe from DRAM), I can acquire the cacheline for write (as opposed to read-and-acquire the cacheline for write)"?
> Why? Zeroing at the point of use means you can skip the DRAM step entirely.
> You save one store to DRAM, and possibly even one load from DRAM.
Do processors (and memory cache systems) already have the optimisation "I detected I am writing the complete cache line, no need to read it (maybe from DRAM), I can acquire the cacheline for write (as opposed to read-and-acquire the cacheline for write)"?