By: anonymous2 (anonymous2.delete@this.example.com), October 20, 2021 7:57 pm
Room: Moderated Discussions
https://www.alibabacloud.com/press-room/alibaba-cloud-unveils-new-server-chips-to-optimize-cloud-computing-services
Built upon advanced 5nm process technology, Yitian 710 is powered by 128 Arm cores with 3.2GHz top clock speed to deliver exceptional performance and excellent energy efficiency. Each processor chip has 60 billion integrated transistors. Yitian 710 is the first server processor that is compatible with the latest Armv9 architecture and includes 8 DDR5 channels and 96-lane PCIe 5.0, providing high memory and I/O bandwidth.
Built upon advanced 5nm process technology, Yitian 710 is powered by 128 Arm cores with 3.2GHz top clock speed to deliver exceptional performance and excellent energy efficiency. Each processor chip has 60 billion integrated transistors. Yitian 710 is the first server processor that is compatible with the latest Armv9 architecture and includes 8 DDR5 channels and 96-lane PCIe 5.0, providing high memory and I/O bandwidth.
Topic | Posted By | Date |
---|---|---|
Yitian 710 | anonymous2 | 2021/10/20 07:57 PM |
Yitian 710 | Adrian | 2021/10/20 11:20 PM |
Yitian 710 | Wilco | 2021/10/21 02:47 AM |
Yitian 710 | Rayla | 2021/10/21 04:52 AM |
Yitian 710 | Wilco | 2021/10/21 10:59 AM |
Yitian 710 | anon2 | 2021/10/21 04:16 PM |
Yitian 710 | Wilco | 2022/07/16 11:21 AM |
Yitian 710 | Anon | 2022/07/16 07:22 PM |
Yitian 710 | Rayla | 2022/07/17 08:10 AM |
Yitian 710 | Anon | 2022/07/17 11:04 AM |
Yitian 710 | Rayla | 2022/07/17 11:08 AM |
Yitian 710 | Wilco | 2022/07/17 12:16 PM |
Yitian 710 | Anon | 2022/07/17 12:32 PM |
Yitian 710 | Wilco | 2022/07/17 01:22 PM |
Yitian 710 | Anon | 2022/07/17 01:47 PM |
Yitian 710 | Wilco | 2022/07/17 02:50 PM |
Yitian 710 | Anon | 2022/07/17 07:46 PM |
Yitian 710 | Wilco | 2022/07/18 02:01 AM |
Yitian 710 | Anon | 2022/07/19 10:21 AM |
Yitian 710 | Wilco | 2022/07/19 05:15 PM |
Yitian 710 | Anon | 2022/07/21 12:25 AM |
Yitian 710 | none | 2022/07/21 12:49 AM |
Yitian 710 | Anon | 2022/07/21 02:03 AM |
Yitian 710 | none | 2022/07/21 03:34 AM |
Yitian 710 | James | 2022/07/21 01:29 AM |
Yitian 710 | Anon | 2022/07/21 02:05 AM |
Yitian 710 | Wilco | 2022/07/21 03:31 AM |
Yitian 710 | Anon | 2022/07/21 04:17 AM |
Yitian 710 | Wilco | 2022/07/21 04:33 AM |
Yitian 710 | Anon | 2022/07/21 04:50 AM |
Yitian 710 | Wilco | 2022/07/21 05:07 AM |
Yitian 710 | Anon | 2022/07/21 05:20 AM |
Yitian 710 | Wilco | 2022/07/21 09:02 AM |
Yitian 710 | Anon | 2022/07/21 09:22 AM |
Yitian 710 | Adrian | 2022/07/17 10:09 PM |
Yitian 710 | Wilco | 2022/07/18 12:15 AM |
Yitian 710 | Adrian | 2022/07/18 01:35 AM |
Yitian 710 | Adrian | 2022/07/16 10:19 PM |
Computations on Big Integers | Bill G | 2022/07/25 09:06 PM |
Computations on Big Integers | none | 2022/07/25 10:35 PM |
x86 MUL 64x64 | Eric Fink | 2022/07/26 12:06 AM |
x86 MUL 64x64 | Adrian | 2022/07/26 01:27 AM |
x86 MUL 64x64 | none | 2022/07/26 01:38 AM |
x86 MUL 64x64 | Jörn Engel | 2022/07/26 09:17 AM |
x86 MUL 64x64 | Linus Torvalds | 2022/07/27 09:13 AM |
x86 MUL 64x64 | ⚛ | 2022/07/28 08:40 AM |
x86 MUL 64x64 | Jörn Engel | 2022/07/28 09:18 AM |
More than 3 registers per instruction | -.- | 2022/07/28 06:01 PM |
More than 3 registers per instruction | Anon | 2022/07/28 09:39 PM |
More than 3 registers per instruction | Jörn Engel | 2022/07/28 09:42 PM |
More than 3 registers per instruction | -.- | 2022/07/29 03:31 AM |
Computations on Big Integers | Bill G | 2022/07/26 12:40 AM |
Computations on Big Integers | none | 2022/07/26 01:17 AM |
Computations on Big Integers | Bill G | 2022/07/26 02:52 AM |
Computations on Big Integers | --- | 2022/07/26 08:57 AM |
Computations on Big Integers | Adrian | 2022/07/26 01:53 AM |
Computations on Big Integers | Bill G | 2022/07/26 02:39 AM |
Computations on Big Integers | Adrian | 2022/07/26 03:21 AM |
Computations on Big Integers in Apple AMX Units | Bill G | 2022/07/26 03:28 AM |
Computations on Big Integers in Apple AMX Units | Adrian | 2022/07/26 04:13 AM |
Typo | Adrian | 2022/07/26 04:20 AM |
IEEE binary64 is 53 bits rather than 52. (NT) | Michael S | 2022/07/26 04:34 AM |
IEEE binary64 is 53 bits rather than 52. | Adrian | 2022/07/26 06:32 AM |
IEEE binary64 is 53 bits rather than 52. | Michael S | 2022/07/26 09:02 AM |
IEEE binary64 is 53 bits rather than 52. | Adrian | 2022/07/27 05:58 AM |
IEEE binary64 is 53 bits rather than 52. | none | 2022/07/27 06:14 AM |
IEEE binary64 is 53 bits rather than 52. | Adrian | 2022/07/27 06:55 AM |
Thanks a lot for the link to the article! (NT) | none | 2022/07/27 07:09 AM |
Typo | zArchJon | 2022/07/26 08:51 AM |
Typo | Michael S | 2022/07/26 09:25 AM |
Typo | zArchJon | 2022/07/26 10:52 AM |
Typo | Michael S | 2022/07/26 12:02 PM |
Computations on Big Integers | Michael S | 2022/07/26 04:55 AM |
Computations on Big Integers | Adrian | 2022/07/26 06:59 AM |
IFMA and Division | Bill G | 2022/07/26 03:25 PM |
IFMA and Division | rwessel | 2022/07/26 07:16 PM |
IFMA and Division | Adrian | 2022/07/27 06:25 AM |
Computations on Big Integers | none | 2022/07/27 12:22 AM |
Big integer multiplication with vector IFMA | Bill G | 2022/07/29 12:06 AM |
Big integer multiplication with vector IFMA | Adrian | 2022/07/29 12:35 AM |
Big integer multiplication with vector IFMA | -.- | 2022/07/29 03:32 AM |
Big integer multiplication with vector IFMA | Adrian | 2022/07/29 08:47 PM |
Big integer multiplication with vector IFMA | Anon | 2022/07/30 07:12 AM |
Big integer multiplication with vector IFMA | Adrian | 2022/07/30 08:27 AM |
AVX-512 unfriendly to heter-performance cores | Paul A. Clayton | 2022/07/31 02:20 PM |
AVX-512 unfriendly to heter-performance cores | Anon | 2022/07/31 02:33 PM |
AVX-512 unfriendly to heter-performance cores | anonymou5 | 2022/07/31 04:03 PM |
AVX-512 unfriendly to heter-performance cores | Brett | 2022/07/31 06:26 PM |
AVX-512 unfriendly to heter-performance cores | Adrian | 2022/08/01 12:45 AM |
Why can't E-cores have narrow/slow AVX-512? (NT) | anonymous2 | 2022/08/01 02:37 PM |
Why can't E-cores have narrow/slow AVX-512? | Ivan | 2022/08/01 11:09 PM |
Why can't E-cores have narrow/slow AVX-512? | anonymou5 | 2022/08/02 09:13 AM |
Why can't E-cores have narrow/slow AVX-512? | Dummond D. Slow | 2022/08/02 02:02 PM |
AVX-512 unfriendly to heter-performance cores | Paul A. Clayton | 2022/08/02 12:19 PM |
AVX-512 unfriendly to heter-performance cores | Anon | 2022/08/02 08:09 PM |
AVX-512 unfriendly to heter-performance cores | Adrian | 2022/08/02 11:50 PM |
AVX-512 unfriendly to heter-performance cores | Anon | 2022/08/03 08:15 AM |
AVX-512 unfriendly to heter-performance cores | -.- | 2022/08/03 07:17 PM |
AVX-512 unfriendly to heter-performance cores | Anon | 2022/08/03 08:02 PM |
IFMA: empty promises from Intel as usual | Kent R | 2022/07/29 06:15 PM |
No hype lasts forever | Anon | 2022/07/30 07:06 AM |
Big integer multiplication with vector IFMA | me | 2022/07/30 08:15 AM |
Computations on Big Integers | --- | 2022/07/26 08:48 AM |
Computations on Big Integers | none | 2022/07/27 12:10 AM |
Computations on Big Integers | --- | 2022/07/28 10:43 AM |
Computations on Big Integers | --- | 2022/07/28 05:44 PM |
Computations on Big Integers | dmcq | 2022/07/26 01:27 PM |
Computations on Big Integers | Adrian | 2022/07/27 07:15 AM |
Computations on Big Integers | Brett | 2022/07/27 10:07 AM |
Yitian 710 | Wes Felter | 2021/10/21 11:51 AM |
Yitian 710 | Adrian | 2021/10/21 12:25 PM |
Yitian 710 | Anon | 2021/10/21 05:08 AM |
Strange definition of the word single. (NT) | anon2 | 2021/10/21 04:00 PM |
AMD Epyc uses chiplets. This is why "strange"? | Mark Roulo | 2021/10/21 04:08 PM |
AMD Epyc uses chiplets. This is why "strange"? | anon2 | 2021/10/21 04:34 PM |
Yeah. Blame spec.org, too, though! | Mark Roulo | 2021/10/21 04:58 PM |
Yeah. Blame spec.org, too, though! | anon2 | 2021/10/21 07:07 PM |
Yeah. Blame spec.org, too, though! | Björn Ragnar Björnsson | 2022/07/17 05:23 AM |
Yeah. Blame spec.org, too, though! | Rayla | 2022/07/17 08:13 AM |
Yeah. Blame spec.org, too, though! | Anon | 2022/07/17 11:01 AM |