-.- (blarg.delete@this.mailinator.com) on July 28, 2022 7:01 pm wrote:
> Jörn Engel (joern.delete@this.purestorage.com) on July 28, 2022 10:18 am wrote:
> > But vblendvps was introduced before mulx and already had four arguments
>
> Note that V{P}BLENDV* is 2-3 uOps on Intel big cores, whilst the SSE {P}BLENDV* is 1 uOp since Skylake.

Interesting. If I check Agner's tables, you seem to be technically wrong while being right in spirit. The rules seem to be that basic blend is 2 µops. If one of the arguments is an immediate instead of a register, that drops down to 1 µop. If one of the argument is memory, it increases to 3 µops.

So it appears as if 3 register arguments can be done in 1 µop and a 4th register argument costs an extra µop.

> Mask registers are on a separate register file, meaning you don't need an additional read
> port on the vector RF. (I suspect this is also a key reason behind having mask registers
> in the first place, over using the existing vector registers a'la BLENDV style)

Not sure if the read port is an argument for mulx. You still have to read %rdx, which is clearly in the same register file. It makes sense for blend, though.