RISC-V asm instruction name madness

By: Heikki Kultala (heikk.i.kultal.a.delete@this.gmail.com), March 9, 2022 12:35 am
Room: Moderated Discussions
There seem to be lots of really stupid instruction naming conventions on RISC-V:

When they were proposing a select instruction to the BMI extension, they were going to call it "cmov"

In the V-extension, they have an instruction named "vrgather".

But that instruction is not a gather load instruction. This instructoin is just a shuffle instruction.

What have the guys deciding the naming of these instructions have been smoking?
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RISC-V asm instruction name madnessHeikki Kultala2022/03/09 12:35 AM
  RISC-V asm instruction name madnessanonymou52022/03/09 02:58 AM
  RISC-V asm instruction name madness-.-2022/03/09 05:39 AM
    RISC-V asm instruction name madnessdmcq2022/03/09 06:04 AM
      RISC-V asm instruction name madness-.-2022/03/09 05:52 PM
        RISC-V asm instruction name madnessAnon2022/03/09 06:33 PM
          RISC-V asm instruction name madnessJukka Larja2022/03/10 07:55 AM
            RISC-V asm instruction name madnessdmcq2022/03/10 09:32 AM
              RISC-V asm instruction name madness-.-2022/03/10 07:52 PM
                RISC-V asm instruction name madnessrwessel2022/03/11 09:38 AM
                  More descriptive asm instruction names-.-2022/03/11 08:22 PM
                    More descriptive asm instruction namesdmcq2022/03/12 12:58 AM
                      More descriptive asm instruction namesdmcq2022/03/12 12:42 PM
                      More descriptive asm instruction names-.-2022/03/12 08:28 PM
                        More descriptive asm instruction namesdmcq2022/03/13 11:46 AM
                          More descriptive asm instruction namesdmcq2022/03/13 11:47 AM
                          More descriptive asm instruction names-.-2022/03/14 10:30 PM
                            More descriptive asm instruction namesdmcq2022/03/15 12:41 AM
                              More descriptive asm instruction names-.-2022/03/15 08:17 PM
                                More descriptive asm instruction namesdmcq2022/03/16 01:51 AM
                                  More descriptive asm instruction namesJukka Larja2022/03/16 07:39 AM
                                    More descriptive asm instruction namesAnon2022/03/16 08:10 AM
                                      More descriptive asm instruction namesJukka Larja2022/03/16 10:57 AM
                                        More descriptive asm instruction namesdmcq2022/03/16 11:45 AM
                                        More descriptive asm instruction namesLinus Torvalds2022/03/16 12:07 PM
                                          Separate FLAGS registers as a performance limitation2022/03/18 09:16 AM
                                            Or do a compare and branch (NT)Anon2022/03/18 11:04 AM
                                            Separate FLAGS registers as a performance limitationLinus Torvalds2022/03/18 11:15 AM
                                              Separate FLAGS registers as a performance limitation2022/03/18 02:50 PM
                                                Separate FLAGS registers as a performance limitationLinus Torvalds2022/03/18 08:32 PM
                                                Separate FLAGS registers as a performance limitationAnon2022/03/18 11:28 PM
                                                  Separate FLAGS registers as a performance limitationLinus Torvalds2022/03/19 10:03 AM
                                                    Separate FLAGS registers as a performance limitationLinus Torvalds2022/03/19 10:46 AM
                                                      Separate FLAGS registers as a performance limitationdmcq2022/03/19 11:17 AM
                                                    Separate FLAGS registers as a performance limitationMarcus2022/03/23 12:30 AM
                                                      Separate FLAGS registers as a performance limitationdmcq2022/03/23 01:30 AM
                                                        Separate FLAGS registers as a performance limitationMarcus2022/03/23 01:55 AM
                                                          Separate FLAGS registers as a performance limitationdmcq2022/03/23 08:31 AM
                                                            Separate FLAGS registers as a performance limitationMarcus2022/03/23 11:02 AM
                                                      Separate FLAGS registers as a performance limitationAnon2022/03/23 10:50 AM
                                                        Separate FLAGS registers as a performance limitationnone2022/03/23 11:04 AM
                                                        Separate FLAGS registers as a performance limitationMarcus2022/03/23 11:28 AM
                                                Separate FLAGS registers as a performance limitationdmcq2022/03/18 11:54 PM
                                                Separate FLAGS registers as a performance limitationPeter E. Fry2022/03/19 06:29 AM
                                            Separate FLAGS registers as a performance limitation---2022/03/18 11:16 AM
                                              Separate FLAGS registers as a performance limitationAdrian2022/03/19 01:46 AM
                                                Separate FLAGS registers as a performance limitationAnon2022/03/19 07:55 AM
                                                  Separate FLAGS registers as a performance limitationMichael S2022/03/19 10:12 AM
                                                    Separate FLAGS registers as a performance limitationAnon2022/03/19 10:27 AM
                                                      Separate FLAGS registers as a performance limitationMichael S2022/03/19 10:40 AM
                                                        Separate FLAGS registers as a performance limitationAnon2022/03/19 12:05 PM
                                                          Separate FLAGS registers as a performance limitationMichael S2022/03/19 12:31 PM
                                                            Separate FLAGS registers as a performance limitationAnon2022/03/19 12:39 PM
                                                              Separate FLAGS registers as a performance limitationMichael S2022/03/19 02:08 PM
                                                                Separate FLAGS registers as a performance limitationAnon2022/03/19 02:44 PM
                                                                  Separate FLAGS registers as a performance limitationMichael S2022/03/19 03:46 PM
                                                          Separate FLAGS registers as a performance limitationAndrey2022/03/19 02:00 PM
                                                            Separate FLAGS registers as a performance limitationAnon2022/03/19 02:24 PM
                                                              Separate FLAGS registers as a performance limitationAndrey2022/03/19 02:37 PM
                                                                Separate FLAGS registers as a performance limitationAnon2022/03/19 02:58 PM
                                                                  Separate FLAGS registers as a performance limitationAdrian2022/03/19 11:41 PM
                                                                    Separate FLAGS registers as a performance limitationanon2022/03/20 02:38 AM
                                                                      Separate FLAGS registers as a performance limitationAnon2022/03/20 02:47 AM
                                                                        Separate FLAGS registers as a performance limitationAdrian2022/03/20 03:37 AM
                                                                          Separate FLAGS registers as a performance limitationAnon2022/03/20 04:35 AM
                                                                            Separate FLAGS registers as a performance limitationAdrian2022/03/20 05:19 AM
                                                                              Separate FLAGS registers as a performance limitationAnon2022/03/20 06:13 AM
                                                                              Separate FLAGS registers as a performance limitationMichael S2022/03/20 06:44 AM
                                                                              Separate FLAGS registers as a performance limitationrwessel2022/03/20 06:57 AM
                                                                              Separate FLAGS registers as a performance limitation---2022/03/20 09:19 AM
                                                                                Separate FLAGS registers as a performance limitationAnon2022/03/20 09:44 AM
                                                                                  One can use forwarding to delay/synchronize register write (NT)Paul A. Clayton2022/03/21 05:28 AM
                                                                        Separate FLAGS registers as a performance limitationDoug S2022/03/20 07:48 AM
                                                                          Separate FLAGS registers as a performance limitationAnon2022/03/20 08:21 AM
                                                                          Separate FLAGS registers as a performance limitation---2022/03/20 09:23 AM
                                                                      Separate FLAGS registers as a performance limitation---2022/03/20 09:15 AM
                                                                        Possible benefit of compiler optimizing for fusionPaul A. Clayton2022/03/24 10:27 AM
                                                                    Separate FLAGS registers as a performance limitationAnon2022/03/20 02:38 AM
                                                                      Separate FLAGS registers as a performance limitationdmcq2022/03/20 03:57 AM
                                                                      Separate FLAGS registers as a performance limitationAdrian2022/03/20 04:04 AM
                                                                        Separate FLAGS registers as a performance limitationrwessel2022/03/20 04:48 AM
                                                                    Width pipelining wide add and SIMDPaul A. Clayton2022/03/21 05:25 AM
                                                                Separate FLAGS registers as a performance limitationdmcq2022/03/19 02:58 PM
                                                                  Separate FLAGS registers as a performance limitationdmcq2022/03/21 10:12 AM
                                                  Separate FLAGS registers as a performance limitationAdrian2022/03/19 10:37 AM
                                                Separate FLAGS registers as a performance limitationdmcq2022/03/19 10:58 AM
                                                  Separate FLAGS registers as a performance limitationAdrian2022/03/19 12:26 PM
                                        More descriptive asm instruction namesAno2022/03/16 05:54 PM
                                          More descriptive asm instruction namesJukka Larja2022/03/17 05:45 AM
                                            More descriptive asm instruction namesMichael S2022/03/18 04:10 AM
                                              More descriptive asm instruction namesJukka Larja2022/03/18 09:53 PM
                                                More descriptive asm instruction namesMichael S2022/03/19 10:18 AM
                                                  More descriptive asm instruction namesJukka Larja2022/03/19 11:59 AM
                                                    Implicit operations in programmingPaul A. Clayton2022/03/21 05:25 AM
                                                      Implicit operations in programmingJukka Larja2022/03/21 07:32 AM
                                                      Implicit operations in programmingAdrian2022/03/21 08:59 AM
                                        More descriptive asm instruction namesKonrad Schwarz2022/03/19 04:46 AM
                                          More descriptive asm instruction namesJukka Larja2022/03/19 11:39 AM
                                            More descriptive asm instruction namesAnon2022/03/19 12:01 PM
                                              More descriptive asm instruction namesJukka Larja2022/03/19 09:17 PM
                                                More descriptive asm instruction namesAnon2022/03/20 02:08 AM
                                                  More descriptive asm instruction namesJukka Larja2022/03/20 03:38 AM
                                              More descriptive asm instruction namesgallier22022/03/24 02:19 AM
                                                More descriptive asm instruction namesAnon2022/03/24 08:52 AM
                                                  More descriptive asm instruction namesrwessel2022/03/24 08:58 AM
                                                    More descriptive asm instruction namesAnon2022/03/24 09:06 AM
                                                      More descriptive asm instruction namesrwessel2022/03/24 10:02 AM
                                            More descriptive asm instruction namesdmcq2022/03/19 12:14 PM
                                              More descriptive asm instruction namesJukka Larja2022/03/19 08:52 PM
                                                More descriptive asm instruction namesdmcq2022/03/20 04:05 AM
                                                  More descriptive asm instruction namesJukka Larja2022/03/20 09:03 AM
                                                    More descriptive asm instruction namesdmcq2022/03/21 02:29 AM
                                                      More descriptive asm instruction namesJukka Larja2022/03/21 07:10 AM
                                                        More descriptive asm instruction namesdmcq2022/03/21 09:53 AM
                                                          More descriptive asm instruction namesJukka Larja2022/03/22 07:09 AM
                                                            More descriptive asm instruction namesAnon2022/03/22 08:36 AM
                                                              More descriptive asm instruction namesJukka Larja2022/03/22 10:21 AM
                                                                More descriptive asm instruction namesdmcq2022/03/22 11:41 AM
                                                More descriptive asm instruction namesgallier22022/03/24 02:36 AM
                                                  More descriptive asm instruction namesdmcq2022/03/24 04:29 AM
                                                    More descriptive asm instruction namesgallier22022/03/25 12:31 AM
                                                      More descriptive asm instruction namesdmcq2022/03/25 01:07 AM
                                                      More descriptive asm instruction namesJukka Larja2022/03/25 05:48 AM
                                                        More descriptive asm instruction namesBrendan2022/03/25 07:14 PM
                                                          Thanks!Mark Roulo2022/03/26 02:09 PM
                                                          More descriptive asm instruction namesAnon2022/03/27 01:49 PM
                                                          More descriptive asm instruction namesJukka Larja2022/04/04 05:27 AM
                                                            I think you want a -verbose flag to view assemblyMark Roulo2022/04/04 06:38 AM
                                                              I think you want a -verbose flag to view assemblyrwessel2022/04/04 06:51 AM
                                                                I think you want a -verbose flag to view assemblyDoug S2022/04/04 09:05 AM
                                                                I think you want a -verbose flag to view assemblydmcq2022/04/04 03:52 PM
                                More descriptive asm instruction namesKonrad Schwarz2022/03/19 04:20 AM
            RISC-V asm instruction name madnessAnon2022/03/10 08:35 PM
              RISC-V asm instruction name madnessJukka Larja2022/03/11 10:55 PM
                RISC-V asm instruction name madnessanonymou52022/03/12 01:43 AM
                  RISC-V asm instruction name madnessJukka Larja2022/03/13 12:25 AM
          RISC-V asm instruction name madness-.-2022/03/10 07:47 PM
            RISC-V asm instruction name madnessAnon2022/03/10 08:40 PM
            RISC-V asm instruction name madnessgallier22022/03/10 11:34 PM
              RISC-V asm instruction name madnessTim2022/03/11 10:56 AM
                RISC-V asm instruction name madnessAnon2022/03/11 11:25 AM
                  RISC-V asm instruction name madnessJörn Engel2022/03/11 12:04 PM
                Me, too (but ...)Mark Roulo2022/03/11 11:26 AM
                  Me, too (but ...)David Hess2022/03/12 10:39 AM
                    Me, too (but ...)Adrian2022/03/12 11:01 AM
                      If APL and assembly language had a baby ...Mark Roulo2022/03/12 06:12 PM
                        If APL and assembly language had a baby ...Adrian2022/03/13 12:38 AM
                          If APL and assembly language had a baby ...Mark Roulo2022/03/13 07:53 AM
                            If APL and assembly language had a baby ...Adrian2022/03/13 09:57 AM
                              If APL and assembly language had a baby ...rwessel2022/03/13 10:23 AM
                              If APL and assembly language had a baby ...Andrey2022/03/14 12:42 AM
                                If APL and assembly language had a baby ...Anon2022/03/14 12:57 AM
                                  If APL and assembly language had a baby ...Michael S2022/03/14 03:07 AM
                                If APL and assembly language had a baby ...dmcq2022/03/14 08:14 AM
                              If APL and assembly language had a baby ...zArchJon2022/03/15 12:04 PM
                                If APL and assembly language had a baby ...dmcq2022/03/16 02:09 AM
                                  If APL and assembly language had a baby ...zArchJon2022/03/16 07:47 AM
                                If APL and assembly language had a baby ...Adrian2022/03/16 02:33 AM
                                  If APL and assembly language had a baby ...dmcq2022/03/16 03:06 AM
                                    If APL and assembly language had a baby ...Adrian2022/03/17 03:37 AM
                                      I keep forgetting that "\" must be doubled inside these posts (NT)Adrian2022/03/17 03:57 AM
                                  If APL and assembly language had a baby ...dmcq2022/03/16 05:08 AM
                                    If APL and assembly language had a baby ...rwessel2022/03/16 06:23 AM
                                  If APL and assembly language had a baby ...Konrad Schwarz2022/03/17 01:27 AM
                                    required *the* Knuth (NT)Michael S2022/03/17 03:33 AM
                      Me, too (but ...)Michael S2022/03/13 07:14 AM
                        Me, too (but ...)Michael S2022/03/13 07:27 AM
                        Me, too (but ...)Adrian2022/03/13 09:29 AM
                        Me, too (but ...)David Hess2022/03/13 01:54 PM
                          Me, too (but ...)Michael S2022/03/13 02:09 PM
                        Me, too (but ...)Andrey2022/03/14 12:27 AM
                          Me, too (but ...)Michael S2022/03/14 02:08 AM
                            Me, too (but ...)Andrey2022/03/14 04:36 AM
                              Me, too (but ...)rwessel2022/03/14 05:32 AM
                              Me, too (but ...)Jukka Larja2022/03/14 06:10 AM
                RISC-V asm instruction name madnessAdrian2022/03/11 12:06 PM
                RISC-V asm instruction name madnessAndrey2022/03/11 03:01 PM
                  RISC-V asm instruction name madnessAdrian2022/03/12 01:24 AM
                RISC-V asm instruction name madnessanon22022/03/11 04:37 PM
                RISC-V asm instruction name madnessrwessel2022/03/11 06:44 PM
                  RISC-V asm instruction name madnesstim2022/03/14 08:34 AM
                    RISC-V asm instruction name madnessKonrad Schwarz2022/03/17 09:00 AM
    RISC-V asm instruction name madnessHeikki Kultala2022/03/09 10:31 PM
      RISC-V asm instruction name madnessAdrian2022/03/10 06:33 AM
        RISC-V asm instruction name madnessanonymou52022/03/10 11:59 AM
          RISC-V asm instruction name madnessrwessel2022/03/11 09:42 AM
            RISC-V asm instruction name madnessAnon2022/03/11 10:44 AM
              RISC-V asm instruction name madnessAdrian2022/03/11 12:45 PM
                RISC-V asm instruction name madnessAnon2022/03/11 01:33 PM
                  RISC-V asm instruction name madnessAndrey2022/03/11 03:09 PM
                    RISC-V asm instruction name madnessAdrian2022/03/12 01:41 AM
                      RISC-V asm instruction name madnessAndrey2022/03/12 03:57 AM
                        RISC-V asm instruction name madnessAnon2022/03/12 04:01 AM
                          RISC-V asm instruction name madnessrwessel2022/03/12 06:12 AM
                            RISC-V asm instruction name madnessAnon2022/03/12 12:50 PM
                              RISC-V asm instruction name madnessKonrad Schwarz2022/03/15 11:20 PM
                                RISC-V asm instruction name madnessAnon2022/03/16 02:07 AM
                            Significant whitespace makes multi-way source merging a nightmareRay2022/03/16 08:58 PM
                              Significant whitespace makes multi-way source merging a nightmarerwessel2022/03/16 09:13 PM
                                Significant whitespace makes multi-way source merging a nightmareBrendan2022/03/17 02:37 AM
                              Significant whitespace makes multi-way source merging a nightmaredmcq2022/03/17 01:03 AM
                                Significant whitespace makes multi-way source merging a nightmaredmcq2022/03/17 01:22 AM
                              Significant whitespace makes multi-way source merging a nightmareFoo_2022/03/17 03:03 AM
                        RISC-V asm instruction name madnessAdrian2022/03/12 04:50 AM
        RISC-V asm instruction name madnessLinus Torvalds2022/03/10 12:25 PM
          RISC-V asm instruction name madnessIan Ameline2022/03/10 02:34 PM
          RISC-V asm instruction name madnessgallier22022/03/10 11:42 PM
          RISC-V asm instruction name madnesskonrad.schwarz2022/03/11 04:26 AM
            RISC-V asm instruction name madnesskonrad.schwarz2022/03/11 04:31 AM
            RISC-V asm instruction name madnessAdrian2022/03/11 05:25 AM
              RISC-V asm instruction name madnesscqwrteur2022/03/11 11:57 AM
            RISC-V asm instruction name madnessLinus Torvalds2022/03/11 12:28 PM
This Post has been deleted
              numeric directionhobold2022/03/11 04:29 PM
                numeric directionRIIR2022/03/11 07:19 PM
                  numeric directionanonymou52022/03/12 01:48 AM
              RISC-V asm instruction name madnessKonrad Schwarz2022/03/12 01:31 AM
                RISC-V asm instruction name madnessrwessel2022/03/12 06:04 AM
              RISC-V asm instruction name madnessdmcq2022/03/12 11:18 AM
              RISC-V asm instruction name madness2022/03/12 01:20 PM
                The most clueless post of the year 2022Heikki Kultala2022/03/12 11:28 PM
                  The most clueless response of the year 20222022/03/14 09:59 PM
              RISC-V asm instruction name madnessJörn Engel2022/03/12 11:08 PM
                big endian crapHeikki Kultala2022/03/12 11:31 PM
                  big endian crapAnne O. Nymous2022/03/13 01:40 AM
                  big endian crapdmcq2022/03/13 01:30 PM
                RISC-V asm instruction name madnessgallier22022/03/14 07:09 AM
                RISC-V asm instruction name madnessFoo_2022/03/14 09:10 AM
              RISC-V asm instruction name madnessTim2022/03/14 12:17 PM
      RISC-V asm instruction name madness-.-2022/03/10 08:00 PM
        RISC-V asm instruction name madnessAnon2022/03/10 08:42 PM
        RISC-V asm instruction name madnessHeikki Kultala2022/03/10 09:59 PM
          RISC-V asm instruction name madness-.-2022/03/11 12:21 AM
            RISC-V asm instruction name madnessrwessel2022/03/11 09:56 AM
              RISC-V asm instruction name madnesszArchJon2022/03/15 01:02 PM
            RISC-V asm instruction name madnessAnon2022/03/11 11:07 AM
              RISC-V asm instruction name madness-.-2022/03/11 08:29 PM
    RISC-V asm instruction name madnessAndrey2022/03/10 08:55 AM
      Why not both?Matt Sayler2022/03/10 01:56 PM
        Why not both?Andrey2022/03/10 05:01 PM
          Why not both?Matt Sayler2022/03/11 09:10 AM
      RISC-V asm instruction name madness-.-2022/03/10 08:03 PM
        RISC-V asm instruction name madnessAndrey2022/03/11 03:01 AM
  Vector ISA and LVIsr2022/03/09 11:26 AM
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