Intel directly copies Zen presentation for Ocean Cove patent

By: --- (---.delete@this.redheron.com), April 6, 2022 2:49 pm
Room: Moderated Discussions
anon (anon.delete@this.ymous.org) on April 6, 2022 11:42 am wrote:
> --- (---.delete@this.redheron.com) on April 6, 2022 10:34 am wrote:
> > zArchJon (anon.delete@this.anon.com) on April 6, 2022 10:20 am wrote:
> > > phoson (me.delete@this.example.org) on April 6, 2022 8:03 am wrote:
> > > > https://twitter.com/Underfox3/status/1511697355145367564
> > > >
> > > > Not even subtle...
> > >
> > > This is probably just due to the lawyers googling to find diagrams. The meat of
> > > the patent has nothing to do with the diagrams in this twitter rant. What is being
> > > patented is a method of zeroing a cache line in a multi-processing system.
> >
> > So what's this about, actually? Some combination of
> > - mark a zero line via a tag bit (so you can "read/write" the line
> > without actually accessing the SRAM, just synthesizing the values)
> > - add to the MOESI/NoC protocol so that you can indicate the movement
> > of zero'd lines with address-only (non-data) transactions.
> > Both save power and (possibly, if you also want to) add performance.
> >
> > Apple did this a while ago, https://patents.google.com/patent/US10691610B2,
> > (in the current implementation I see it
> > - not having any effect on cache effective size
> > - probably having a power effect, I have no way to tell
> > - not having any bandwidth effect when interacting with SLC/DRAM BUT
> > - having a bandwidth effect when interacting with L2, where you can zero
> > lines faster than expected because of the address-only transaction)
> >
> > and I'm sure there are many other ways to do it.
> > A different way to slice the problem (with some nice advantages)
> > is Seznick's "Zero-Content Augmented Cache"
> > which requires some additional logic but allows you to cover many more zero'd line with that logic.
> > The simple (add a bit in the tag) scheme used by Apple (and, for all I know, AMD and now Intel) is an easy
> > retrofit, but only really saves you power, and leaves an SRAM line unused. The Seznick scheme is a parallel
> > cache (probably best done at L3) that consists of only tags, no data lines, and associates with each tag a
> > bitmap of 8 (or 16 or 32 or ...) bits marking the associated
> > lines as zero-only. The lines are assumed to be
> > used in similar ways so that MOESI tags can be shared (or
> > fairly simple additional bits added per line). Obviously
> > the tag lookup needs to be slightly different given that
> > one tag covers a larger area. The payoff is a small
> > amount of extra area that covers most of the common use
> > cases, from zero'd pages to to zeroing data structures
> > and arrays, while saving a fair amount of power through reduced SRAM and DRAM accesses.
> > Of course you need to ensure that the extra tag accesses do not squander
> > the saved SRAM accesses, but overall the scheme looks like a win.
>
> Who is that Seznick you keep mentioning ? I think you mean Dusser
> et al. ;) https://hal.inria.fr/inria-00374524/document

My bad for trying to remember a French name, rather than looking it!

I meant André Seznec of course (who, like Onur Mutlu, is one of those Forrest Gump types who's present at the invention of practically everything interesting).
Now working for Intel (but I fully expect that collaboration to as fruitless as all the other fantastic micro-architectural work sponsored by Intel over the past 20 years, but then never actually used by them.)
< Previous Post in ThreadNext Post in Thread >
TopicPosted ByDate
Intel directly copies Zen presentation for Ocean Cove patentphoson2022/04/06 08:03 AM
  Intel directly copies Zen presentation for Ocean Cove patentzArchJon2022/04/06 10:20 AM
    Intel directly copies Zen presentation for Ocean Cove patent---2022/04/06 10:34 AM
      Intel directly copies Zen presentation for Ocean Cove patentanon2022/04/06 11:42 AM
        Intel directly copies Zen presentation for Ocean Cove patent---2022/04/06 02:49 PM
      V-way-stylecache for compression and tag-only inclusionPaul A. Clayton2022/04/07 12:12 PM
        V-way-stylecache for compression and tag-only inclusion---2022/04/07 12:58 PM
  Intel directly copies Zen presentation for Ocean Cove patent---2022/04/06 10:21 AM
  Intel directly copies Zen presentation for Ocean Cove patentaaron spink2022/04/06 05:31 PM
    Intel directly copies Zen presentation for Ocean Cove patentDoug S2022/04/06 10:45 PM
      Intel directly copies Zen presentation for Ocean Cove patentDoug S2022/04/06 10:53 PM
        Intel directly copies Zen presentation for Ocean Cove patentAdrian2022/04/07 05:45 AM
          The one who twitted does does not know to read patents.Adrian2022/04/07 05:55 AM
            The one who twitted does does not know to read patents.me2022/04/07 10:15 AM
              The one who twitted does does not know to read patents.Anon2022/04/08 12:53 AM
              The one who twitted does does not know to read patents.Adrian2022/04/08 03:49 AM
            but what about copyrighthobold2022/04/08 03:44 AM
              but what about copyrightAdrian2022/04/08 04:00 AM
                but what about copyrightAdrian2022/04/08 04:10 AM
              but what about copyrightaaron spink2022/04/09 05:28 AM
                but what about copyrightMatt Sayler2022/04/09 07:27 AM
                  but what about copyrightAdrian2022/04/09 09:39 AM
                    but what about copyrighthobold2022/04/09 12:01 PM
                      prior artanonymou52022/04/09 07:19 PM
                      but what about copyrightUngo2022/04/09 11:06 PM
                      but what about copyrightAdrian2022/04/10 03:53 AM
      Intel directly copies Zen presentation for Ocean Cove patentblaine2022/04/08 01:52 PM
        Intel directly copies Zen presentation for Ocean Cove patentanon22022/04/08 06:41 PM
        Intel directly copies Zen presentation for Ocean Cove patentaaron spink2022/04/09 05:31 AM
          Intel directly copies Zen presentation for Ocean Cove patentblaine2022/04/11 10:06 AM
            Intel directly copies Zen presentation for Ocean Cove patentMatt Sayler2022/04/13 10:34 AM
            Intel directly copies Zen presentation for Ocean Cove patentaaron spink2022/04/14 02:18 AM
            Intel directly copies Zen presentation for Ocean Cove patentanon22022/04/14 10:26 PM
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