By: Adrian (a.delete@this.acm.org), May 19, 2022 12:22 am
Room: Moderated Discussions
Brett (ggtgp.delete@this.yahoo.com) on May 18, 2022 11:03 am wrote:
> Doug S (foo.delete@this.bar.bar) on May 18, 2022 10:26 am wrote:
> AVX512 Is dead until ram moves on chip in 5-10 years, even then you still hit heat
> issues which pushes you to use that extra die space for NPU compute units.
>
> So AVX512 is just plain dead dead.
>
AVX-512 will become dead dead only if the Intel/AMD x86-64 ISA will become dead dead, and be replaced by AArch64 with SVE2.
The fact that AVX-512 happens to use 512-bit vectors, which may be or may not be suitable for laptop CPUs is just a historical accident.
The Larrabee New Instructions a.k.a. AVX-512, was a well-designed SIMD ISA, which would have simplified a lot the work of many programmers, had it been chosen for all Intel products.
The AVX ISA, designed later by a different Intel team, instead of reusing a subset of the Larrabee instructions, was just a set of minimal improvements to the much less-than-ideal SSE SIMD ISA. A couple of years later, Haswell added some Larrabee features to AVX, e.g. FMA and gather, but there is no way to add to AVX the most important Larrabee feature, the mask registers.
If AVX-512 would die, x86-64 would remain stuck with a worse SIMD ISA than any competitor. This has been true for more than 20 years, since 1999, when Intel SSE was worse than Motorola AltiVec.
However, in the past the Intel/AMD had other advantages, much more important than a good ISA. Nowadays, those advantages have diminished a lot, so I do not think that Intel can afford to abandon AVX-512, even if they have handled it exceedingly bad until now.
> Doug S (foo.delete@this.bar.bar) on May 18, 2022 10:26 am wrote:
> AVX512 Is dead until ram moves on chip in 5-10 years, even then you still hit heat
> issues which pushes you to use that extra die space for NPU compute units.
>
> So AVX512 is just plain dead dead.
>
AVX-512 will become dead dead only if the Intel/AMD x86-64 ISA will become dead dead, and be replaced by AArch64 with SVE2.
The fact that AVX-512 happens to use 512-bit vectors, which may be or may not be suitable for laptop CPUs is just a historical accident.
The Larrabee New Instructions a.k.a. AVX-512, was a well-designed SIMD ISA, which would have simplified a lot the work of many programmers, had it been chosen for all Intel products.
The AVX ISA, designed later by a different Intel team, instead of reusing a subset of the Larrabee instructions, was just a set of minimal improvements to the much less-than-ideal SSE SIMD ISA. A couple of years later, Haswell added some Larrabee features to AVX, e.g. FMA and gather, but there is no way to add to AVX the most important Larrabee feature, the mask registers.
If AVX-512 would die, x86-64 would remain stuck with a worse SIMD ISA than any competitor. This has been true for more than 20 years, since 1999, when Intel SSE was worse than Motorola AltiVec.
However, in the past the Intel/AMD had other advantages, much more important than a good ISA. Nowadays, those advantages have diminished a lot, so I do not think that Intel can afford to abandon AVX-512, even if they have handled it exceedingly bad until now.
