By: Jukka Larja (roskakori2006.delete@this.gmail.com), May 25, 2022 6:24 am
Room: Moderated Discussions
Brendan (btrotter.delete@this.gmail.com) on May 24, 2022 5:09 pm wrote:
> a) even if ISAs are exactly the same there could be up to 10% performance/efficiency improvement because
> lots of optimizations (instruction selection and scheduling, which instructions a fused or not, prefetch
> scheduling distance, whether branch prediction has aliasing issues with "too many branches too close",
> which cache size for cache blocking optimizations, ...) depend on micro-arch (and P cores and E cores use
> very different micro-arch, and ARM's "big" cores and "little" cores use very different micro-arch)
How much CPU model optimized code do you think is running on PCs? I tried to find such parameters for Visual Studio, but failed. Doesn't seem to be something developers often do.
-JLarja
> a) even if ISAs are exactly the same there could be up to 10% performance/efficiency improvement because
> lots of optimizations (instruction selection and scheduling, which instructions a fused or not, prefetch
> scheduling distance, whether branch prediction has aliasing issues with "too many branches too close",
> which cache size for cache blocking optimizations, ...) depend on micro-arch (and P cores and E cores use
> very different micro-arch, and ARM's "big" cores and "little" cores use very different micro-arch)
How much CPU model optimized code do you think is running on PCs? I tried to find such parameters for Visual Studio, but failed. Doesn't seem to be something developers often do.
-JLarja