Peter Lewis (peter.delete@this.notyahoo.com) on June 4, 2022 7:06 pm wrote:
> One thing that might help x86 to survive is if more chip area on future processors is used for special-purpose accelerators, such as neural engines, rather than CPU cores. The smaller the fraction of transistors used for CPU cores, the less differences between x86 and ARM will matter.

People have been predicting the death of x86 to some RISC for the best part of 30 years. If history teaches us anything it is that ISA is less important than many people think.

Moreover, Intel is already doing this! On my Tigerlake system I have a:

lspci | grep Accelerator
00:08.0 System peripheral: Intel Corporation GNA Scoring Accelerator module (rev 01)

which is some sort of low power inference accelerator (https://sigport.org/sites/default/files/docs/PosterFinal.pdf). Is it any good? No idea, as with all accelerators which are not integrated into the ISA it requires drivers, and user-land support code.

Given this, if there is spare die area the best use for it is probably on more powerful iGPUs. These are devices for which we have good cross-vendor APIs (OpenCL, OpenGL, Vulkan) and so stand a chance of actually being appreciated by consumers.

But, in general, any accelerator which requires an API is going to be substantially less useful than one which can be accessed through the ISA. This is why it is trivial for library code to use SIMD (it is part of the ISA and only requires the OS know how to store some registers upon context switches) but very difficult to seamlessly use a GPU (which GPU?, what device context?, how do permissions work?, can multiple processes use it at once?).

This is one of the areas where IBM Z series tends to do a good job.