Adrian (a.delete@this.acm.org) on June 13, 2022 10:42 pm wrote:
> --- (---.delete@this.redheron.com) on June 13, 2022 9:11 pm wrote:
> >
> > The distinction between contacts and layers is a reasonable point, but is it significant?
> > Is there an interest/important reason why it's more difficult to create a layer of cobalt traces
> > than to create short vertical contacts of cobalt? I guess there is *some* difference given that
> > tungsten has frequently been used for these sorts of plugs, but I'd love to know the full story.
>
>
> The distinction is very significant.
>
> Already since the beginning there were speculations that the cobalt interconnections
> may have a too large resistance, and that TSMC might be wiser by using cobalt
> only for contacts, instead of using it for traces, like Intel.
>
> This has been confirmed now by the Intel presentation, where the figure comparing the interconnection metals
> used in Intel 4 and Intel 7 shows good reliability but bad resistance for the cobalt interconnections.
>
>
> A cobalt contact has a small resistance, because it is very short and it is also wider than its length.
>
> A cobalt trace on the other hand, introduces a much greater resistance, because it is long and narrow.
>

So your argument would be not that cobalt traces were difficult to fab, but that they behaved too poorly? That's logically consistent, but seems like something that should have been caught a *lot* earlier! So much about this whole episode we just don't know.