By: me (me.delete@this.me.com), June 14, 2022 6:11 pm
Room: Moderated Discussions
> NVidia gets away with this because the margins on the A100 chips are very
> high. But this is probably a bad plan for laptop and desktop chips.
>
You'd be surprised.
Take Alder Lake-S. They are probably "okay" with it being cut to the 12400 or the 12450HX because those are the biggest volume parts.
The 12400 has two of the six big cores disabled and both small clusters. It also only has 18 MB of the 30 MB L3 enabled. The IGP has it's EU cut from 32 to 24. And there's the completely cut F model as well.
The HX line probably only really exists because of the 12450HX, where it cuts down to 4 of 8 cores while keeping one of the small clusters and cuts the EUs down to 16.
When people talk about redundancy they are talking about NOT having to cut like this.
IMO, the latest Sapphire Rapids ramp delay is almost certainly because they are unhappy with the number of non busted cores per tile they are getting.
> high. But this is probably a bad plan for laptop and desktop chips.
>
You'd be surprised.
Take Alder Lake-S. They are probably "okay" with it being cut to the 12400 or the 12450HX because those are the biggest volume parts.
The 12400 has two of the six big cores disabled and both small clusters. It also only has 18 MB of the 30 MB L3 enabled. The IGP has it's EU cut from 32 to 24. And there's the completely cut F model as well.
The HX line probably only really exists because of the 12450HX, where it cuts down to 4 of 8 cores while keeping one of the small clusters and cuts the EUs down to 16.
When people talk about redundancy they are talking about NOT having to cut like this.
IMO, the latest Sapphire Rapids ramp delay is almost certainly because they are unhappy with the number of non busted cores per tile they are getting.
