By: Math Nerd (math.nerd.delete@this.nerds.com), July 2, 2022 3:15 pm
Room: Moderated Discussions
> Since you have to put a pattern on the full wafer so polishing works evenly you have some CPU dies that are
> more than half off the wafer, and many of those will work in a reduced mode if you are smart in your layout.
> If only two cores of 8 work, fine, sell it in the low end laptop market, it was a one third sized die anyway.
That’s an interesting idea. The Xeon Sapphire Rapids wafer does have die that overlap the edge of the wafer, as this photo shows:
digitaltrends.com/computing/intel-sapphire-rapids-server-cpu-delayed-yet-again
The different shapes of die that overlap the edge of wafer would be a challenge for the packaging and reliability people. For reliability testing, you want as few variations as possible. An alternative to using die with a curved side from the edge of the wafer would be to use smaller size chiplets (tiles) and connect them in the package. Smaller size chiplets reduce the unused area at the edge of the wafer. With smaller size chiplets, the question remains, what is the optimal die shape for the chiplet (rectangular, hexagonal or triangular)?
> more than half off the wafer, and many of those will work in a reduced mode if you are smart in your layout.
> If only two cores of 8 work, fine, sell it in the low end laptop market, it was a one third sized die anyway.
That’s an interesting idea. The Xeon Sapphire Rapids wafer does have die that overlap the edge of the wafer, as this photo shows:
digitaltrends.com/computing/intel-sapphire-rapids-server-cpu-delayed-yet-again
The different shapes of die that overlap the edge of wafer would be a challenge for the packaging and reliability people. For reliability testing, you want as few variations as possible. An alternative to using die with a curved side from the edge of the wafer would be to use smaller size chiplets (tiles) and connect them in the package. Smaller size chiplets reduce the unused area at the edge of the wafer. With smaller size chiplets, the question remains, what is the optimal die shape for the chiplet (rectangular, hexagonal or triangular)?