Matt Sayler (sayler.delete@this.thewalrus.org) on July 26, 2022 11:57 am wrote:
> Duane Sand (duanebsand.delete@this.gmail.com) on July 24, 2022 11:50 am wrote:
> > What was this amazing thing? How was it so fast? How was it used? Did it need water cooling,
> > also? What were the reasons to not use similar techniques for the mainframes themselves? Could
> > a similar design be used in our latest cmos chips, with similarly fast single-thread results?
>
> It seems like an odd thing to build, absent some specific requirement. It's a hard to tell from the
> little public docs what the console would do that would prompt someone to use this approach.
>
> Any details? I see the 3036 described as a dual display console with some diagnostic
> and control apparatus. I assume that the two displays have their own logic to control
> and generate the view…? What else would the "console" have done?

Yes, an odd thing to build.

The 29 pages of Section 20 of
"A Guide to the IBM 3033 Processor Complex, Attached Processor Complex, and Multiprocessor Complex of System/370"
http://www.bitsavers.org/pdf/ibm/3033/GC20-1859-4_3033_ProcessorComplex_Apr79.pdf
describes the operator views and customer engineer views of that console.

It handles power-on and coolant-on sequencing, and microcode bringup of the main machine, and manages microdiagnostic testing of the main machine until it reaches the point of reliably running its own. All of the console's actions can be directed remotely over a comm line.
It also the main computer's driver controller for two floppy disk drives, and emulates the usual logic of the two 3270-style displays. Everything is duplicated (separate controllers for separate displays) for fault tolerance reasons.

None of that explains why a fast-clock ECL controller was used. A few years later, and most such things got delegated to slow, cheap, and tiny MOS microprocessors. I think the microdiagnostics and limited tracing ability was perhaps the motivation. Or it may have been designed with high-bandwidth disk controllers in mind.

It looks to be air cooled. They chose to use the fastest (non IBM?) available logic family rather than the densest. And that needed very fast ram. To keep cost and heat low, both the datapath and fast memory needed to be kept small. I'm assuming that the datapath was 5 bits wide. So most practical steps needed many instructions. The speed of single instructins made up for that. I am guessing that it was organized as a vertical microengine, interpretively running a larger body of code stored in slower denser dram.