Paul Bishop (paul.bishop.delete@this.bytemind.com) on July 27, 2022 3:32 pm wrote:
> Paul Bishop (paul.bishop.delete@this.bytemind.com) on July 27, 2022 2:48 pm wrote:
> > IBM's ECL is referred to as MST (I, II, and IV) running 1.25V Vcc and -3.0V Vee so the signal swings
> > ~ 200mv around ground. Yes 3036 was 5-bit machine with 16-bit instruction counter. The I/O to the 3033
> > (put/take) buses were 5-bit so... The 3036 processors (2x) ran at 9.5419MHz and used regular 'ol IBM
> > COB (card-on-board) technology. Mostly MST but some VTL (Vendor-transistor logic - the IBM way to say
> > TTL) for disk interface. I don't have the ALDs (schematics) any more, threw them out 25 years ago, like
> > a dumb-a$$, but I do have the data-flow diagrams and functional packaging diagrams. I'll put them on
> > my site and share the link. Also some 3033 pics here, including the 3036: Mainframe Musings
>
> Here's some selected 3036 Docs

Thanks so much Paul!
So the 3036 controllers ran at least 15x slower than my IBM friend imagined from hallway rumors 3 decades ago. That makes it quite a bit less interesting to me.

From the diagram on page 5, it looks to me like the 3036 main memory was 10 bits wide plus parity, and the whole 10 bits were used when fetching and executing instructions. Data path is 5 bits, with 4 ad hoc registers. IC and Link are 16 bits. 256w x 10 bits of ROS code for startup. Interrupts nested 6 levels deep. 64 bytes of scratchpad. 64w x 8 bits of control store for sequencing or gate control within single instructions.

The controller is integrated with DMA circuits for driving a raster-scan CRT, with character lookups and font lookups from the main memory. Characters do NOT use a 5-bit code.