Anon (no.delete@this.spam.com) on August 11, 2022 4:27 am wrote:
> Simon Farnsworth (simon.delete@this.farnz.org.uk) on August 10, 2022 1:16 am wrote:
> > The thing is that it is possible to come up with code that does depend on frequency alone to perform (where
> > the maximum possible IPC is 1), and such code does exist in some application domains; the mistake the
> > religious belief makes is to assume that this code matters to a majority of users of processors.
>
> That's bullshit, no code depends on frequency alone (even if the code is a sequency of dependent adds,
> there are out there CPUs with add latency of 2 and others with latency 0.5) and "IPC is 1" is just a mith,


The CPU's where the latency of register addition has been 2 or 0.5 or other values different from 1 have been obsolete for decades.

Such CPU's are traditionally named "superpipelined" and "underpipelined", since 1988, when Norman P. Jouppi at Digital Equipment Corporation named them so.

DEC hoped that a superpipelined CPU would be better than the superscalar CPU's promoted at that time by IBM, but they were wrong.

Superpipelined and underpipelined CPU's have existed many decades before these names were coined, e.g. CDC 6600 was superpipelined.


Now, already for a long time there has been a consensus that both superpipelined and underpipelined CPU's are worse than the CPU's where the latency of register addition is 1, so the latter is true for all modern CPU's.