Adrian (a.delete@this.acm.org) on August 11, 2022 11:10 pm wrote:
> Anon (no.delete@this.spam.com) on August 11, 2022 4:27 am wrote:
> > Simon Farnsworth (simon.delete@this.farnz.org.uk) on August 10, 2022 1:16 am wrote:
> > > The thing is that it is possible to come up with code that does depend on frequency alone to perform (where
> > > the maximum possible IPC is 1), and such code does exist in some application domains; the mistake the
> > > religious belief makes is to assume that this code matters to a majority of users of processors.
> >
> > That's bullshit, no code depends on frequency alone (even if the code is a sequency of dependent adds,
> > there are out there CPUs with add latency of 2 and others with latency 0.5) and "IPC is 1" is just a mith,
>
>
> The CPU's where the latency of register addition has been 2 or 0.5
> or other values different from 1 have been obsolete for decades.

IBM PowerPC CPUs of today have 2 cycle latency for such things.

Perhaps you could argue they are not as good as contemporaries, but you can't say obsolete for decades.

Fusing and getting 0.5 effective latency on dependent adds is also a reasonable way to state it. I don't see where the comment was predicated on unfused reg to reg operations, it was just talking about executing a chain of dependent adds.