I hope you find something, but there are challenges

By: Adrian (a.delete@this.acm.org), August 3, 2022 2:19 am
Room: Moderated Discussions
Mark Roulo (nothanks.delete@this.xxx.com) on August 2, 2022 6:48 pm wrote:
>
  • Stack or memory based architecture (you really want registers)



  • Nobody has proven yet whether encoding the operands implicitly with operations defined on a stack is better or worse than encoding the operands using register numbers.

    The problem with the early stack-based instruction encodings, like Intel 8087, was that they used ONLY ONE STACK, not that they were stack based.

    In modern OoO CPUs, the register numbers used in the instruction encodings are no longer addresses, but only means to specify the data dependencies between instructions. The same data dependencies can be specified implicitly when the operand belong to a stack.

    Allowing each instruction to specify 1 of 4 operand stacks might be enough to remove most false dependencies, while specifying 1 of 8 operand stacks is pretty much certain to prevent the apparition of false dependencies.

    There is no doubt that a stack-based encoding with multiple operand stacks would increase a lot the code density. What is not clear is how much more complex would be the implementation of such a CPU in comparison with using register numbers for operands, i.e. if the improvement in code density would be worthwhile.

    The most complex issues with a stack-base encoding would be to determine which are the best strategies for avoiding operand stack overflow and for what to save or not save across function invocations.
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