By: --- (---.delete@this.redheron.com), August 21, 2022 1:26 pm
Room: Moderated Discussions
rwessel (rwessel.delete@this.yahoo.com) on August 21, 2022 12:17 pm wrote:
> dmcq (dmcq.delete@this.fano.co.uk) on August 21, 2022 11:36 am wrote:
> > Kara (karaardalan.delete@this.gmail.com) on August 20, 2022 11:04 pm wrote:
> > > rwessel (rwessel.delete@this.yahoo.com) on August 20, 2022 6:50 pm wrote:
> > > > HTM on about the only platform on which it's been reasonably
> > > > successfully implemented, namely Z, is going away.
> > > >
> > > > On page 93 of:
> > > >
> > > > https://www.redbooks.ibm.com/redpieces/pdfs/sg248951.pdf
> > > >
> > > > "Removal of support of the transactional execution and constrained transactional
> > > > execution facility: In a future IBM Z hardware system family, the transactional execution
> > > > and constrained transactional execution facility will no longer be supported. Users of the
> > > > facility on current servers should always check the facility indications before use."
> > > >
> > > > So introduced on the EC12s, and still on z16, but not long for this world.
> > > >
> > > > IBM also removed it from Power10 a couple of years ago.
> > >
> > >
> > > Well, ARM is just getting started with its TME lol.
> > >
> > > Also I remember in anandtech's deep dive of the M1 they said apple is using
> > > a HTM to share threads between the big cores, so, that's something!
> >
> > Yes I was more than a little surprised about ARM talking about transactional memory when
> > launching ARMv9. They did clean up their memory model when they found problems investigating
> > it a few years ago but I think they must have got to the stage where they believe they can
> > actually implement a reasonable version? Perhaps IBM have discovered a problem like ARM did?
> > Or maybe they've had a better idea? Or is implementing it just too costly overall?
>
>
> AFAIK, there have been no major issues with HTM on Z in the five generations it's been
> implemented on (although z16 experience is thin at this point). Presumably usage is
> too low and/or the performance gains are too limited (obviously those may be two side
> of the same coin). Or perhaps just too much work to implement for the gain.
I've no idea what the M1 claim is about!
But the generic issue may be that HTM is to simultaneously too strong and too weak a contract.
The alternative is that the HW give you effectively the performance of HTM, but through speculation as to the behavior of the atomic operations involved, eg
(2020) https://patents.google.com/patent/US20220091846A1 Atomic Operation Predictor.
In a sense this is like providing HTM (you need the same sort of machinery to store and unwind state) but without the hassle that you are locked into particular claims (transactions can be up to X instructions long, must not include more than Y types of this operation, etc etc), you can change the details as best fits each new design. What you lose is the SW ease of HTM, but if you are confident that your language provides that anyway...
> dmcq (dmcq.delete@this.fano.co.uk) on August 21, 2022 11:36 am wrote:
> > Kara (karaardalan.delete@this.gmail.com) on August 20, 2022 11:04 pm wrote:
> > > rwessel (rwessel.delete@this.yahoo.com) on August 20, 2022 6:50 pm wrote:
> > > > HTM on about the only platform on which it's been reasonably
> > > > successfully implemented, namely Z, is going away.
> > > >
> > > > On page 93 of:
> > > >
> > > > https://www.redbooks.ibm.com/redpieces/pdfs/sg248951.pdf
> > > >
> > > > "Removal of support of the transactional execution and constrained transactional
> > > > execution facility: In a future IBM Z hardware system family, the transactional execution
> > > > and constrained transactional execution facility will no longer be supported. Users of the
> > > > facility on current servers should always check the facility indications before use."
> > > >
> > > > So introduced on the EC12s, and still on z16, but not long for this world.
> > > >
> > > > IBM also removed it from Power10 a couple of years ago.
> > >
> > >
> > > Well, ARM is just getting started with its TME lol.
> > >
> > > Also I remember in anandtech's deep dive of the M1 they said apple is using
> > > a HTM to share threads between the big cores, so, that's something!
> >
> > Yes I was more than a little surprised about ARM talking about transactional memory when
> > launching ARMv9. They did clean up their memory model when they found problems investigating
> > it a few years ago but I think they must have got to the stage where they believe they can
> > actually implement a reasonable version? Perhaps IBM have discovered a problem like ARM did?
> > Or maybe they've had a better idea? Or is implementing it just too costly overall?
>
>
> AFAIK, there have been no major issues with HTM on Z in the five generations it's been
> implemented on (although z16 experience is thin at this point). Presumably usage is
> too low and/or the performance gains are too limited (obviously those may be two side
> of the same coin). Or perhaps just too much work to implement for the gain.
I've no idea what the M1 claim is about!
But the generic issue may be that HTM is to simultaneously too strong and too weak a contract.
The alternative is that the HW give you effectively the performance of HTM, but through speculation as to the behavior of the atomic operations involved, eg
(2020) https://patents.google.com/patent/US20220091846A1 Atomic Operation Predictor.
In a sense this is like providing HTM (you need the same sort of machinery to store and unwind state) but without the hassle that you are locked into particular claims (transactions can be up to X instructions long, must not include more than Y types of this operation, etc etc), you can change the details as best fits each new design. What you lose is the SW ease of HTM, but if you are confident that your language provides that anyway...