By: Konrad Schwarz (no.spam.delete@this.no.spam), August 28, 2022 6:12 am
Room: Moderated Discussions
Simon Farnsworth (simon.delete@this.farnz.org.uk) on August 24, 2022 3:58 am wrote:
> And on some codebases (SAP HANA is the poster child), you really
> did get this win from Intel TSX with all its flaws.
>
> AFAICT, though, that was in large part because SAP HANA was sufficiently poorly written that doing fine-grained
> locking well was hard, and thus it was a best case scenario for HTM (eliding coarse-grained locks that
> in practice never had cacheline level conflicts while taken, hence no false conflicts).
Do you know of any write-ups on this?
> And on some codebases (SAP HANA is the poster child), you really
> did get this win from Intel TSX with all its flaws.
>
> AFAICT, though, that was in large part because SAP HANA was sufficiently poorly written that doing fine-grained
> locking well was hard, and thus it was a best case scenario for HTM (eliding coarse-grained locks that
> in practice never had cacheline level conflicts while taken, hence no false conflicts).
Do you know of any write-ups on this?
