By: Anon (no.delete@this.spam.com), August 27, 2022 9:54 pm
Room: Moderated Discussions
Nobod (Nobod.delete@this.nospam.com) on August 27, 2022 9:21 am wrote:
> Chips & Cheese analyzes Tachyum’s Revised Prodigy Architecture
>
> The new architecture is more traditional and more likely to work. Unfortunately it is trying to address
> both HPC and datacenter server markets, but isn’t better than the alternatives at either job.
Did anyone noticed the front end? Some days ago we were discussing about variable length instructions and too much fetch width, well, Tachyum thinks it is a good idea to have instruction 4 or 8 bytes wide, at 8 wide decode the instruction fetch is... 128 bytes, yep, 64 bytes would be enough in the worst case, but they think 128 bytes per cycle is better, I won't say that what Tachyum thinks matter at all, but I think this was one interesting point.
> Chips & Cheese analyzes Tachyum’s Revised Prodigy Architecture
>
> The new architecture is more traditional and more likely to work. Unfortunately it is trying to address
> both HPC and datacenter server markets, but isn’t better than the alternatives at either job.
Did anyone noticed the front end? Some days ago we were discussing about variable length instructions and too much fetch width, well, Tachyum thinks it is a good idea to have instruction 4 or 8 bytes wide, at 8 wide decode the instruction fetch is... 128 bytes, yep, 64 bytes would be enough in the worst case, but they think 128 bytes per cycle is better, I won't say that what Tachyum thinks matter at all, but I think this was one interesting point.
