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By: Anon (no.delete@this.spam.com), August 29, 2022 11:46 pm
Room: Moderated Discussions
Chester (lamchester.delete@this.gmail.com) on August 29, 2022 11:37 pm wrote:
> Seems common to have both. For example, Cortex A72 seems to have a decoupled 64 entry L1 BTB.
> After that, it seems to have a second level BTB coupled to the L1i, that can track up to 4096
> branch targets as the branches don't spill out of the 48 KB L1i. So if there's a branch every
> 16 bytes, it can track 3072 targets. Or 768 if there's a branch every 64 bytes, and so on.

This is weird, 4096 entries on 48kB L1? Are the entries shared by multiple ways?
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        Chips & Cheese analyzes Tachyum’s Revised Prodigy Architecture---2022/08/29 09:53 AM
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        Chips & Cheese analyzes Tachyum’s Revised Prodigy Architecture---2022/08/29 10:11 AM
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                    or patentsUngo2022/08/31 01:10 PM
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                        or patentsChester2022/08/31 07:05 PM
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