--- (---.delete@this.redheron.com) on August 31, 2022 4:01 pm wrote:
> Ungo (a.delete@this.b.c.d.e) on August 31, 2022 1:10 pm wrote:
> > --- (---.delete@this.redheron.com) on August 31, 2022 10:44 am wrote:
> > > That's great. And when you send me the links to the talks and papers where Apple has disclosed
> > > this info, I'll be all over them. Until then, what what do you suggest I do?

Then testing is your only option. That's why I prefer to write about architectures that are at least somewhat well documented by the manufacturer. Because creating even a basic block diagram through microbenchmarking alone is *very* time consuming and error prone.

> >
> > I dunno about Chester, but it seems rather obvious: just stop. It's pointless to spend so many hours
> > doing what you do. You cannot reverse engineer specific chip design details based on layman's misreadings
> > of deliberately vague patents which may or may not even apply to the chips you're talking about.
> >
> > If you really love reading patents, carry on, just have some humility and grace about it. Stop pretending
> > patent claims are unimpeachable facts when you haven't
> > done the empirical legwork to prove they apply to the
> > subject at hand.
>
> Uhh, have you read my PDFs? I have in fact done a fair amount of "the empirical legwork
> to prove they apply to the subject at hand", as far as this is feasible. Obviously feasibility
> is extremely limited, especially as one leaves the core for the rest of the SoC.
>
> I no longer have an M1 so I cannot perform specific tests right now, but
> I did as much as I could over the past year or so, all written up.

Great. Then instead wasting time pointing to a patent or fairy tail or whatever, go straight to "testing showed xyz behavior, I believe it means abc about the architecture because...."

That's useful and worth discussing.