By: Adrian (a.delete@this.acm.org), August 31, 2022 11:58 pm
Room: Moderated Discussions
noko (noko.delete@this.noko.com) on August 31, 2022 3:21 pm wrote:
> Anon (no.delete@this.spam.com) on August 31, 2022 2:24 pm wrote:
> > Adrian (a.delete@this.acm.org) on August 31, 2022 10:10 am wrote:
> > > Zen 4 supports AVX-512, therefore it *MUST* have 32 512-bit registers. There is no doubt about that.
> >
> > It must have at least 64 256 bit registers, which Zen 3 already had, In all AMD CPUs
> > supporting wider vector register then implemented they break the instruction in two
> > uops, including Zen 1, I see no reason for they doing anything new this time.
>
> Agner estimates the physical vector registers of Zen 1-3 at ~160, and that Zen 1 had 160x
> 128b registers, so 256b AVX effectively had 80 physical registers. Which means a smaller
> OoOE window, though I don't remember anyone really measuring the effect of that for Zen 1.
The thirty-two 512-bit registers of AVX-512 are the architectural registers visible through the ISA, an increase from the sixteen 256-bit registers of AVX.
As you say, Zen 3 already had sufficient physical registers to implement the AVX-512 architectural registers, so no significant changes are expected in Zen 4 in this respect.
> Anon (no.delete@this.spam.com) on August 31, 2022 2:24 pm wrote:
> > Adrian (a.delete@this.acm.org) on August 31, 2022 10:10 am wrote:
> > > Zen 4 supports AVX-512, therefore it *MUST* have 32 512-bit registers. There is no doubt about that.
> >
> > It must have at least 64 256 bit registers, which Zen 3 already had, In all AMD CPUs
> > supporting wider vector register then implemented they break the instruction in two
> > uops, including Zen 1, I see no reason for they doing anything new this time.
>
> Agner estimates the physical vector registers of Zen 1-3 at ~160, and that Zen 1 had 160x
> 128b registers, so 256b AVX effectively had 80 physical registers. Which means a smaller
> OoOE window, though I don't remember anyone really measuring the effect of that for Zen 1.
The thirty-two 512-bit registers of AVX-512 are the architectural registers visible through the ISA, an increase from the sixteen 256-bit registers of AVX.
As you say, Zen 3 already had sufficient physical registers to implement the AVX-512 architectural registers, so no significant changes are expected in Zen 4 in this respect.