--- (---.delete@this.redheron.com) on September 16, 2022 6:25 pm wrote:
> anon2 (anon.delete@this.anon.com) on September 16, 2022 5:49 pm wrote:
> > --- (---.delete@this.redheron.com) on September 16, 2022 11:28 am wrote:
> > > anon2 (anon.delete@this.anon.com) on September 15, 2022 7:04 pm wrote:
> > > > Everybody knows the data integrity problems with parity protected write-back arrays. ECC has also
> > > > seemed to be a difficult problem for L1 data cache that seems like nobody has solved very well.
> > > >
> > >
> > > > What is expensive about L1 ECC which is less costly in
> > > > L2? Keep in mind you need write-through, so L2 has to
> > > > receive all the stores.
> > >
> > > ECC saves bits (relative to simpler options like replication) by performing math across
> > > the ENTIRE line. This means that each time you modify an element of L1, something (whether
> > > in the core itself or in the L1) will have to read the entire line (whether before or
> > > after the write) to calculate the new ECC value. That's a lot of extra power.
> > >
> > > L2 is different because the entire line is written at once
> > > from the L1 to the L2, so there's a one-time calculation.
> >
> > Uh, obviously that's not the case in a write-through L1 design.
>
> Who still uses write-through L1's? (In "normal" computing,
> not weird cases like micro-controllers or whatever.)

Oh, seeing as I wasn't actually explicit, IBM does with POWER and (AFAIK) mainframe CPUs.