By: Anon (no.delete@this.spam.com), September 18, 2022 12:54 pm
Room: Moderated Discussions
David Kanter (dkanter.delete@this.realworldtech.com) on September 18, 2022 12:29 pm wrote:
> That's true, but sub-line ECC has a much higher area overhead.
> So maybe I'd state it as 'power or area, take your pick'...
Does it really matter? I mean, if you only modify 8 bytes out of the 64 bytes of the cache line then old_value XOR new_value should give you enough information to update the ECC bits of the entire cache line, only parity would actually appear per 8 bytes or so to not increase read latency too much.
> That's true, but sub-line ECC has a much higher area overhead.
> So maybe I'd state it as 'power or area, take your pick'...
Does it really matter? I mean, if you only modify 8 bytes out of the 64 bytes of the cache line then old_value XOR new_value should give you enough information to update the ECC bits of the entire cache line, only parity would actually appear per 8 bytes or so to not increase read latency too much.