In the new revision from September 2022 of "Intel Architecture Instruction Set Extensions and Future Features", there are a few interesting additions.


For example, for several of the useful AVX-512 instructions, e.g. for IFMA, new AVX encodings are provided.

I suppose that this is related to the fact that even Intel Meteor Lake from next year will not have AVX-512.

Alder Lake and Raptor Lake already include AVX encodings for a few groups of instructions initially added to AVX-512 (like also Zen 3), but it is likely that the number of such instructions will be expanded in Meteor Lake, to lessen the disadvantage of not having AVX-512, versus Zen 4 and its successors.


Another addition is that the AMX instructions are expanded with operations on larger number, e.g. dot product of 16-bit FP numbers with accumulation in 32-bit FP numbers. This will increase the number of applications for AMX, even if they remain behind NVIDIA or AMD, which in their datacenter GPU models implement matrix operations up to FP64.

I assume that this AMX extension will appear in the server CPUs that will use the next Intel CMOS process, i.e. in Granite Rapids, since Emerald Rapids are just a refresh of Sapphire Rapids.



https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html