A16 packaging

By: --- (---.delete@this.redheron.com), October 25, 2022 9:45 am
Room: Moderated Discussions
There's an interesting article on A16 packaging here:
(in Japanese but Google or Apple Translate do an adequate job)
https://eetimes-itmedia-co-jp.translate.goog/ee/articles/2210/25/news048.html?_x_tr_sl=auto&_x_tr_tl=en&_x_tr_hl=en&_x_tr_pto=wapp

The most interesting point is that, as far as I can tell, they are claiming the packaging is no longer PoP, with the SoC placed below a pre-packaged discrete memory module.
Rather there's a stiffener sheet of glass, to which are attached, on one side, four DRAM chips (along with some stiffener silicon), and on the other side the SoC then the RDL.
Between the sub-optimal translation and the sub-optimal photos, many details are unclear (starting with how the connections are made between the DRAM chips and the SoC!) but overall the result is presumably physically smaller/thinner, with even lower energy DRAM communication costs.

Yole claims A15 used standard PoP:
https://s3.i-micronews.com/uploads/2021/11/SPR21607_Apple’s-A15-Bionic-System-on-Chip_Sample.pdf
but they haven't released an A16 report yet so we can't get their take.
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A16 packaging---2022/10/25 09:45 AM
  A16 packaging - thermal dissipation gel---2022/10/25 10:08 AM
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