By: Gionatan Danti (g.danti.delete@this.assyoma.it), December 9, 2022 12:31 am
Room: Moderated Discussions
Etienne (etienne_lorrain.delete@this.yahoo.fr) on December 8, 2022 6:20 am wrote:
> Looks like my AMD Ryzen 9 7950x has a L3 cache bandwidth of 63.9 GB/s, my current DRAM DDR5
> has either 49.6 GB/s (Jedec) or 52.5 GB/s (AMD Expo) measured by memtest86 UEFI.
> It seems some companies are increasing DRAM bandwidth: 8Gbps DDR5.
>
> I assume latency to L3 cache is still probably better than latency to
> DRAM, but in simple terms, do we still need L3 cache in processors?
If I remember correctly, AMD L3 bandwidth result is (roughly) per-core, scaling with multiple threads much more readily than DRAM. In other words, aggregate per-chip L3 bandwidth should be much higher than DRAM bandwidth.
Moreover, a shared L3 cache has lower latency and provides an on-chip "synchronization point" between multiple cores (without forcing per-core communication via DRAM).
Regards.
> Looks like my AMD Ryzen 9 7950x has a L3 cache bandwidth of 63.9 GB/s, my current DRAM DDR5
> has either 49.6 GB/s (Jedec) or 52.5 GB/s (AMD Expo) measured by memtest86 UEFI.
> It seems some companies are increasing DRAM bandwidth: 8Gbps DDR5.
>
> I assume latency to L3 cache is still probably better than latency to
> DRAM, but in simple terms, do we still need L3 cache in processors?
If I remember correctly, AMD L3 bandwidth result is (roughly) per-core, scaling with multiple threads much more readily than DRAM. In other words, aggregate per-chip L3 bandwidth should be much higher than DRAM bandwidth.
Moreover, a shared L3 cache has lower latency and provides an on-chip "synchronization point" between multiple cores (without forcing per-core communication via DRAM).
Regards.