What happens when DRAM has more bandwidth than Layer 3 cache?

By: Anon (no.delete@this.thanks.com), December 20, 2022 7:46 am
Room: Moderated Discussions
--- (---.delete@this.redheron.com) on December 8, 2022 3:54 pm wrote:
> That was not my point.
> My point was that a cluster of cores (certainly for Apple and some ARM, and I think for Intel
> E-cores) can share an L2, and if you're operating in a world like that, you may want to make
> the L2 large enough that (apparently) you no longer need an L3 in terms of capacity.
> (That is essentially Apple's *apparent* design as far as CPU's goes.)
>
> The rest of the post was then an explanation as to why,
> EVEN for such a design, something "L3-like" is required.

It's interesting to look at AMD's progression on this. Their Jaguar CPUs had 4-core clusters with shared L2 and no L3, and they had multiple CPU clusters in the console APUs (Playstation 4 and XBox One). For the follow up Zen cores in Playstation 5/XBox Series X they kept the same rough layout of two clusters of four cores, each with a shared cache cluster, but they added in an additional layer of cache between L1 and LLC, so what was previously L2 was now L3.

The interesting distinction is more whether there is a shared global Last Level Cache, or if it is split between clusters. Getting hung up on L2 vs L3 misses that.

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TopicPosted ByDate
What happens when DRAM has more bandwidth than Layer 3 cache?Etienne2022/12/08 07:20 AM
  What happens when DRAM has more bandwidth than Layer 3 cache?Simon Farnsworth2022/12/08 08:22 AM
    bandwidth*delay productMichael S2022/12/08 09:06 AM
    What happens when DRAM has more bandwidth than Layer 3 cache?---2022/12/08 11:44 AM
      What happens when DRAM has more bandwidth than Layer 3 cache?blaine2022/12/08 06:07 PM
  What happens when DRAM has more bandwidth than Layer 3 cache?Michael S2022/12/08 08:32 AM
    What happens when DRAM has more bandwidth than Layer 3 cache?Etienne2022/12/08 09:05 AM
      What happens when DRAM has more bandwidth than Layer 3 cache?Michael S2022/12/08 09:13 AM
        What happens when DRAM has more bandwidth than Layer 3 cache?Etienne2022/12/08 02:56 PM
  What happens when DRAM has more bandwidth than Layer 3 cache?Peter E. fry2022/12/08 09:20 AM
  Programs do not see bandwidth. Programs only see latency. Heikki Kultala2022/12/08 09:26 AM
    Programs do not see bandwidth. Programs only see latency. Chester2022/12/08 12:07 PM
  What happens when DRAM has more bandwidth than Layer 3 cache?Doug S2022/12/08 10:31 AM
  What happens when DRAM has more bandwidth than Layer 3 cache?---2022/12/08 11:32 AM
    What happens when DRAM has more bandwidth than Layer 3 cache?Michael S2022/12/08 03:42 PM
      What happens when DRAM has more bandwidth than Layer 3 cache?---2022/12/08 04:54 PM
        What happens when DRAM has more bandwidth than Layer 3 cache?Anon2022/12/20 07:46 AM
  What happens when DRAM has more bandwidth than Layer 3 cache?Andrey2022/12/08 04:10 PM
    What happens when DRAM has more bandwidth than Layer 3 cache?Etienne2022/12/14 04:20 AM
  What happens when DRAM has more bandwidth than Layer 3 cache?Gionatan Danti2022/12/09 01:31 AM
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