Hi,

Groo (charlie.delete@this.semiaccurate.com) on January 29, 2023 8:46 am wrote:
> anonymou5 (no.delete@this.spam.com) on January 28, 2023 3:03 am wrote:
> > > Why they have not followed the standard methodology in this field, is a mystery.
> >
> > They did.
> >
> > The bug in question was of a different nature, and missed because of a different chain of circumstances.
>
> If you are talking about the bug that delayed SPR from Q3(barely) to Q1/23 (barely), I totally agree. I
> know specifically what the bug was and was the first to report it for Intel last May. SPR is enormously
> complex, stunningly so and, well, good luck testing all interactions of all the parts pre-silicon.
>
> I will stand by what I said last May, Intel did the right thing to delay SPR. They took a lot of sh*t
> for it but it was the right thing to do.

Intel take a lot of shit because they continually fail to learn from the previous 20+ years of assuming complexity can be increased beyond what anyone on earth can manage and then suffering the inevitable consequences.

Every year Intel say "Yay, we have a new product that's more complex than any product ever before" quickly followed by "Oops, our new product is buggy"; and then after its too late they improve their processes (validation, etc) to deal with the current amount of complexity (but not the future complexity) without ever doing a single thing to try to contain or reduce the ever-growing complexity (e.g. discontinuing things like TSX and SGX, and instead adding a whole pile of new "secure uncrippling and payment processing" complexity for Intel On Demand).

At this point; saying "they did the right thing when dealing with inevitable consequences of problems they caused" is like saying a 50 year old toddler did the right thing AFTER hitting their thumb with a hammer for the 50th time in a row.

- Brendan