Article: CELL Microprocessor Revisited
By: Ricardo Bugalho (ricardo.b.delete@this.zmail.pt), March 7, 2005 4:05 pm
Room: Moderated Discussions
Page 2
Figure 1 above illustrates an XDR memory system with a 16 bit wide data bus (For the purpose of illustration only. The XDR memory system on the CELL processor has two physical channels that are 36 bits wide per channel).
Isn't 36 a typo?
Figure 1 above illustrates an XDR memory system with a 16 bit wide data bus (For the purpose of illustration only. The XDR memory system on the CELL processor has two physical channels that are 36 bits wide per channel).
Isn't 36 a typo?
| Topic | Posted By | Date |
|---|---|---|
| CELL Microprocessor Revisited | David Kanter | 2005/03/07 12:21 PM |
| CELL Microprocessor Revisited | Ricardo Bugalho | 2005/03/07 04:05 PM |
| CELL Microprocessor Revisited | David Wang | 2005/03/07 05:45 PM |
| CELL Microprocessor Revisited | hobold | 2005/03/08 09:10 AM |
| CELL Microprocessor Revisited | mas | 2005/03/27 09:27 PM |
