New CELL Article Online

Article: CELL Microprocessor III
By: David Wang (dwang.delete@this.RWTexpanded.com), August 8, 2005 1:57 pm
Room: Moderated Discussions
Deadmeat (deadmeatoa@yahoo.com) on 8/7/05 wrote:
---------------------------
>>I've since received two negative feedbacks on the "DD2 PPE has Gekko" speculation
>>from people who *should* know. So I'm now back to square one. The flops are mysterious
>>once again with no explanation as to how to account for the last 4 flops per cycle.
>
>Since DD2 has a maximum instruction issue rate of 2 per cycle, one has to be an
>Altivec FMAC and the other has to be "Gekko" FMAC to reach 12 FLOPS per cycle.
>
>If DD2 was a tri-issue, then 1 Altivec + 2 FMAC instructions might make sense, but it isn't here.

It makes perfect sense if the DD2 PPE has a scalar FPU that is independent from the FMAC Altivec units and the scalar FPU can also handle Gekko-like short vectors to get 4 flops per cycle, 12 flops per cycle for the DD2 PPE in total. I would be perfectly happy if this senario was true. Unfortunately, I have two different people telling me that it isn't, and they don't know where Sony got the 218 Gflops number from. At this time, I have no reason to doubt the credibility or veracity of either one of them. The result is that despite the attractiveness of the "Gekko speculation", I have been forced to go back to the drawing board to try and figure out how to reconcile these numbers.

If you have specific and credible sources that points to whether Gekko is is isn't in the DD2 PPE, I'd love to hear about it. Otherwise, you're simply re-stating a theory that has already been stated, and does not further substantiate the theory.
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