New CELL Article Online

Article: CELL Microprocessor III
By: Deadmeat (Deadmeatoa.delete@this.yahoo.com), August 8, 2005 6:25 pm
Room: Moderated Discussions
>I think there's some sort of circular reasoning going on here now. I'm questioning
>Sony's methodology for counting FLOPS (because I've ran out of other more reasonable
>explanations), but you're simply re-asserting the 12 FMAC FLOPS per cycle assumption
>for DD2 PPE... And round and round we go.

Think about it; APU Vector Unit and PPE's Altivecs are functionally equivalent, yet neither IBM nor SCEI claims 12 FLOPS for APUs, they only claim 8 FLOPS even though the APU too can issue an FMAC and FMOV instructions in parallel. This is your proof that SCEI is not counting FMOV as 4 FLOPS.

Then what does PPE has that APU doesn't? It is that FPU.

> I either have to believe that they're unaware
>of the Gekko addition to the DD2 PPE or that both of them are purposefully deceiving me.

Probably unaware. Notice that Altivec/FPU unit is decoupled from the CPU core and seems to be a plug in. It was probably a custom design to satisfy the requirement of all three customers. Then it only makes sense that it includes the full set of Gecko instructions for GameCube backward compatibility.

My guess is that Gecko instructions were added to meet Nintendo's requirement, yet both SCEI and MS are taking advantage of it.

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