Article: CELL Microprocessor III
By: David Wang (dwang.delete@this.RWTexpanded.com), August 8, 2005 7:46 pm
Room: Moderated Discussions
Deadmeat (Deadmeatoa@yahoo.com) on 8/8/05 wrote:
---------------------------
>>I think there's some sort of circular reasoning going on here now. I'm questioning
>>Sony's methodology for counting FLOPS (because I've ran out of other more reasonable
>>explanations), but you're simply re-asserting the 12 FMAC FLOPS per cycle assumption
>>for DD2 PPE... And round and round we go.
>
>Think about it; APU Vector Unit and PPE's Altivecs are functionally equivalent,
>yet neither IBM nor SCEI claims 12 FLOPS for APUs, they only claim 8 FLOPS even
>though the APU too can issue an FMAC and FMOV instructions in parallel. This is
>your proof that SCEI is not counting FMOV as 4 FLOPS.
>
>Then what does PPE has that APU doesn't? It is that FPU.
As I wrote previously, it is part of the mystery of the 218 Gflops number.
What hasn't changed here is that the Gekko FPU speculation is simply that, a speculation. It is at this time not a confirmed feature on anything resembling official documation. Five days ago, I was sold on this theory. It made sense. However, as I've repeatedly stated, I must also give weight to the conflicting statements that counter this theory.
>> I either have to believe that they're unaware
>>of the Gekko addition to the DD2 PPE or that both of them are purposefully deceiving me.
>
>Probably unaware. Notice that Altivec/FPU unit is decoupled from the CPU core and
>seems to be a plug in. It was probably a custom design to satisfy the requirement
>of all three customers. Then it only makes sense that it includes the full set of
>Gecko instructions for GameCube backward compatibility.
I thought about that possibility as well. For one thing, Peter is the lead architect of the SPE, not the PPE.
However, it is still rather difficult to believe that the official technical contact for the CELL processor, the person making the slides that we've been referencing, is unaware of the Gekko FPU addition.
Moreover, as difficult as it is to believe that Peter is simply unaware of the Gekko FPU addition to the DD2 PPE, it is even more difficult to believe that a second independent source, one that works on developing programming models for the CELL processor as a whole, would be equally unaware of the Gekko FPU addition to the DD2 PPE. One would almost have to believe that the PPE architects and DE's hid the Gekko FPU addition from everyone except Sony and MS's marketing folks.
It is an enigma.
>My guess is that Gecko instructions were added to meet Nintendo's requirement,
>yet both SCEI and MS are taking advantage of it.
Well, if indeed Gekko had been added to DD2 PPE for Nintendo, neither Sony nor MS has to do anything to "take advantage of it". It could simply exist to enables a "12 FLOPS per cycle" claim. Whether Sony or MS actually "takes advantage" of such an FPU is another story.
BTW, it's Gekko, not Gecko.
http://www.hotchips.org/archives/hc13/2_Mon/06ibm-gekko.pdf
---------------------------
>>I think there's some sort of circular reasoning going on here now. I'm questioning
>>Sony's methodology for counting FLOPS (because I've ran out of other more reasonable
>>explanations), but you're simply re-asserting the 12 FMAC FLOPS per cycle assumption
>>for DD2 PPE... And round and round we go.
>
>Think about it; APU Vector Unit and PPE's Altivecs are functionally equivalent,
>yet neither IBM nor SCEI claims 12 FLOPS for APUs, they only claim 8 FLOPS even
>though the APU too can issue an FMAC and FMOV instructions in parallel. This is
>your proof that SCEI is not counting FMOV as 4 FLOPS.
>
>Then what does PPE has that APU doesn't? It is that FPU.
As I wrote previously, it is part of the mystery of the 218 Gflops number.
What hasn't changed here is that the Gekko FPU speculation is simply that, a speculation. It is at this time not a confirmed feature on anything resembling official documation. Five days ago, I was sold on this theory. It made sense. However, as I've repeatedly stated, I must also give weight to the conflicting statements that counter this theory.
>> I either have to believe that they're unaware
>>of the Gekko addition to the DD2 PPE or that both of them are purposefully deceiving me.
>
>Probably unaware. Notice that Altivec/FPU unit is decoupled from the CPU core and
>seems to be a plug in. It was probably a custom design to satisfy the requirement
>of all three customers. Then it only makes sense that it includes the full set of
>Gecko instructions for GameCube backward compatibility.
I thought about that possibility as well. For one thing, Peter is the lead architect of the SPE, not the PPE.
However, it is still rather difficult to believe that the official technical contact for the CELL processor, the person making the slides that we've been referencing, is unaware of the Gekko FPU addition.
Moreover, as difficult as it is to believe that Peter is simply unaware of the Gekko FPU addition to the DD2 PPE, it is even more difficult to believe that a second independent source, one that works on developing programming models for the CELL processor as a whole, would be equally unaware of the Gekko FPU addition to the DD2 PPE. One would almost have to believe that the PPE architects and DE's hid the Gekko FPU addition from everyone except Sony and MS's marketing folks.
It is an enigma.
>My guess is that Gecko instructions were added to meet Nintendo's requirement,
>yet both SCEI and MS are taking advantage of it.
Well, if indeed Gekko had been added to DD2 PPE for Nintendo, neither Sony nor MS has to do anything to "take advantage of it". It could simply exist to enables a "12 FLOPS per cycle" claim. Whether Sony or MS actually "takes advantage" of such an FPU is another story.
BTW, it's Gekko, not Gecko.
http://www.hotchips.org/archives/hc13/2_Mon/06ibm-gekko.pdf
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