Cache associativity

By: Linus Torvalds (, August 16, 2005 10:48 am
Room: Moderated Discussions
David Kanter ( on 8/16/05 wrote:
>It sounds like you really prefer highly associative caches.

I definitely do. With some nice FP loops you may be able
to work around direct-mapped caches, and argue that you
can make the cache sufficiently faster that it's worth
the hoops the simpler/faster hardware makes you jump
through. I suspect that embedded people might have the
same argument.

With general-purpose programming, the pain is just too
big. You get a lot of cache misses due to way contention.

There's tons of data on this. If you want spec D$ miss
rates, see for example

which says that for D$ there's about 25% more misses
for a direct-mapped cache than for a two-way one in the
L1 cache size range (the difference is even bigger for I$,
but the miss numbers there are smaller, of course).

And that's ignoring the worst case - that's just average.

So I personally would want at least 4-way in the L1, and
as much as possible in the L2. And if full associativity
doesn't work out, then some mixing in of other bits to hash
the thing around to avoid common alignment-induced "hot
ways", that sounds like a good idea to me (people seem to
call it "pseudo-associative").

One of the things I personally like about highly associative
caches is the graceful degradation. I'd much rather
have a system that tends to slow down more gracefully than
fall of a steep cliff ("glass jaw") when something bad
happens. A direct-mapped cache basically is asking for
trouble - it may perform fine "on average", but then it has
nasty situations where it really sucks.

Me, I'll take "consistently good" over "really really good
if all the planets align correctly" any day. When it comes
to caches, that means that I'd much rather take a two-
cycle L1 that is big and has high associativity over a
single-cycle small one. Even if the single-cycle one then
runs like a bat out of hell when things go the rigt way.

I guess this is all the same argument that make me prefer
a P-M over a P4. "Plodding and dependable workhorse" is
better than a sprinter that hits a brick wall every once in
a while.

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TopicPosted ByDate
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  It's official - Hitachi's chipset not overly imprepigdog2005/08/11 01:05 PM
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                chipset vs OS/compilerPaul DeMone2005/08/14 05:40 AM
                  chipset vs OS/compilerLinus Torvalds2005/08/14 06:48 AM
                    chipset vs OS/compilerPaul DeMone2005/08/14 08:48 AM
                      chipset vs OS/compilerLinus Torvalds2005/08/14 09:07 AM
                        chipset vs OS/compilerAnonymous Donkey2005/08/14 04:10 PM
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                      linux mallocLinus Torvalds2005/08/14 02:10 PM
                        linux mallocRicardo Bugalho2005/08/14 03:15 PM
                          linux mallocAndi Kleen2005/08/15 01:37 AM
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                chipset vs OS/compilerS. Rao2005/08/15 09:36 AM
                  chipset vs OS/compilerArun Ramakrishnan2005/08/15 01:42 PM
  It's official - Hitachi's chipset not overly impreChuck2005/08/12 11:18 AM
    I believe ...leonov2005/08/12 11:26 AM
      I believe ...Andi Kleen2005/08/13 05:07 AM
        I believe ...Paul DeMone2005/08/13 06:41 AM
          I believe ...Andi Kleen2005/08/13 01:08 PM
            I believe ...Paul DeMone2005/08/13 01:29 PM
              I believe ...David Kanter2005/08/13 07:55 PM
                I believe ...Andi Kleen2005/08/14 04:50 AM
              I believe ...Andi Kleen2005/08/14 04:47 AM
        Children are the future.john evans2005/08/13 05:30 PM
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            Changes to PathscaleDavid Kanter2005/08/14 08:53 AM
              Changes to PathscaleAndi Kleen2005/08/14 11:06 AM
                Changes to PathscaleMichael_S2005/08/15 02:02 AM
                  Changes to PathscaleAndi Kleen2005/08/15 02:37 PM
                  Changes to PathscaleLinus Torvalds2005/08/15 05:18 PM
                    Changes to Pathscalejohn evans2005/08/15 08:49 PM
                      Changes to PathscaleLinus Torvalds2005/08/16 07:28 AM
                        Cache associativityDavid Kanter2005/08/16 08:52 AM
                          Cache associativityLinus Torvalds2005/08/16 10:48 AM
                            Cache associativityDavid Kanter2005/08/16 11:14 AM
                              Cache associativity and virtualizationslim2005/08/16 07:39 PM
                                Cache associativity and virtualizationDavid Kanter2005/08/16 07:50 PM
                                Cache associativity and virtualizationrwessel2005/08/16 09:27 PM
                        Changes to Pathscalejohn evans2005/08/16 08:52 PM
                          Oh, one more thing.john evans2005/08/16 09:21 PM
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                              Sharing is tough!john evans2005/08/17 07:24 PM
                    Changes to PathscaleMichael S2005/08/16 12:33 AM
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                        Opteron load reorderingAnonymous2005/08/17 03:36 PM
                          Opteron load reorderingIlleglWpns2005/08/17 04:00 PM
                            Opteron load reorderingAnonymous2005/08/18 12:12 AM
                              Opteron load reorderingIlleglWpns2005/08/18 12:37 AM
                A compiler for OpteronRob Thorpe2005/08/16 10:52 AM
  It's official - Hitachi's chipset not overly impressiveJosĂ© Javier zarate2005/08/23 07:51 AM
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