RWT on P.A. Semi

Article: P.A. Semi's PA6T-1682M System-on-a-Chip
By: Linus Torvalds (, October 24, 2005 10:09 am
Room: Moderated Discussions
David Kanter ( on 10/24/05 wrote:
>I have just finished up a new article that provides very
>in-depth coverage of the P.A. Semi PWRficient product
>family, and the first implementation, the PA6T-1682M.

Nice article, and looks like an interesting chip. Not your
average "high-performance" embedded thing, but something
that really looks like it might have competitive performance
even outside of the embedded market.

Of course, since they haven't taped out yet, who knows.
Things can certainly change when the chips come back...

The cache hierarchy seems potentially a bit weak (the L2 is
22 cycles away, which is average), but considering that the
IO side apparently has access to it too, that may be the
right choice. And they seem to have a nice fast and low
latency memory setup.

And at 25W max, that is a pretty studly chip. Good for
them if they can deliver.

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TopicPosted ByDate
RWT on P.A. SemiDavid Kanter2005/10/24 05:19 AM
  RWT on P.A. SemiMXYZPTLK2005/10/24 06:13 AM
    Thanks for the correctionDavid Kanter2005/10/24 10:30 PM
  nice piece, very well donemas2005/10/24 08:26 AM
  RWT on P.A. SemiLinus Torvalds2005/10/24 10:09 AM
  Am I the only one thinking...Foo_2005/10/24 12:09 PM
    Am I the only one thinking...Daniel Bizó2005/10/24 02:04 PM
  RWT on P.A. SemiBill Todd2005/10/26 04:53 PM
    RWT on P.A. SemiDavid Kanter2005/10/26 05:57 PM
      RWT on P.A. SemiBill Todd2005/10/26 06:32 PM
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