Events - store misses

Article: Performance Analysis Tools: A Look at VTune
By: anonymous (no.delete@this.spam.com), August 15, 2006 6:33 am
Room: Moderated Discussions
>x86 cannot re-order stores.

That statement is a little too generic/simplistic.

For the actual rules, see section 7.2 of Intel's volume 3A (#253668-020).

In particular, check section 7.2.2 rule 3 (CLFLUSH and MOVNT*), as well as section 7.2.3 (out-of-order fast strings). Speculative TLB fills that set A/D bits are similar.
< Previous Post in ThreadNext Post in Thread >
TopicPosted ByDate
VTune Article onlineDavid Kanter2006/08/13 10:10 PM
  1 ms ticks at 1 khz, 1 us ticks at 1 Mhzjl2006/08/13 10:32 PM
  Events - store missesMartin H. Kristiansen2006/08/14 12:29 AM
    Events - store missesDavid Kanter2006/08/14 09:30 PM
      Events - store missesMartin H. Kristiansen2006/08/15 01:03 AM
      Events - store missesanonymous2006/08/15 06:33 AM
        Events - store missesAndi Kleen2006/08/15 11:12 AM
          Events - store missesanonymous2006/08/15 06:41 PM
      memory disambiguationMichael S2006/08/15 04:54 PM
Reply to this Topic
Name:
Email:
Topic:
Body: No Text
How do you spell avocado?